am42dl1614 Meet Spansion Inc., am42dl1614 Datasheet - Page 2
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am42dl1614
Manufacturer Part Number
am42dl1614
Description
Stacked Multi-chip Package Mcp Flash Memory And Sram
Manufacturer
Meet Spansion Inc.
Datasheet
1.AM42DL1614.pdf
(61 pages)
Am42DL16x4D
Stacked Multi-Chip Package (MCP) Flash Memory and SRAM
Am29DL16xD 16 Megabit (2 M x 8-Bit/1 M x 16-Bit) CMOS 3.0 Volt-only, Simultaneous
Operation Flash Memory and 4 Mbit (256 K x 16-Bit) Static RAM
DISTINCTIVE CHARACTERISTICS
MCP Features
Flash Memory Features
ARCHITECTURAL ADVANTAGES
PERFORMANCE CHARACTERISTICS
This document contains information on a product under development at Advanced Micro Devices. The information
is intended to help you evaluate this product. AMD reserves the right to change or discontinue work on this proposed
product without notice.
Power supply voltage of 2.7 to 3.3 volt
High performance
— Access time as fast as 70 ns
Package
— 69-Ball FBGA
Operating Temperature
— –40° C to +85°C
Simultaneous Read/Write operations
— Data can be continuously read from one bank while
— Zero latency between read and write operations
Secured Silicon (SecSi) Sector: Extra 64 KByte sector
— Factory locked and identifiable: 16 bytes available for
— Customer lockable: Can be read, programmed, or erased
Zero Power Operation
— Sophisticated power management circuits reduce power
Top or bottom boot block
Manufactured on 0.23 µm process technology
Compatible with JEDEC standards
— Pinout and software compatible with single-power-supply
High performance
— 70 ns access time
— Program time: 4 µs/word typical utilizing Accelerate function
Ultra low power consumption (typical values)
— 2 mA active read current at 1 MHz
— 10 mA active read current at 5 MHz
— 200 nA in standby or automatic sleep mode
Minimum 1 million write cycles guaranteed per sector
20 Year data retention at 125 C
— Reliable operation for the life of the system
executing erase/program functions in other bank
secure, random factory Electronic Serial Number; verifiable
as factory locked through autoselect function.
just like other sectors. Once locked, data cannot be changed
consumed during inactive periods to nearly zero
flash standard
PRELIMINARY
Refer to AMD’s Website (www.amd.com) for the latest information.
SOFTWARE FEATURES
HARDWARE FEATURES
SRAM Features
Data Management Software (DMS)
— AMD-supplied software manages data programming and
— Eases sector erase limitations
Supports Common Flash Memory Interface (CFI)
Erase Suspend/Erase Resume
— Suspends erase operations to allow programming in same
Data# Polling and Toggle Bits
— Provides a software method of detecting the status of
Unlock Bypass Program command
— Reduces overall programming time when issuing multiple
Any combination of sectors can be erased
Ready/Busy# output (RY/BY#)
— Hardware method for detecting program or erase cycle
Hardware reset pin (RESET#)
— Hardware method of resetting the internal state machine to
WP#/ACC input pin
— Write protect (WP#) function allows protection of two outermost
— Acceleration (ACC) function accelerates program timing
Sector protection
— Hardware method of locking a sector, either in-system or
— Temporary Sector Unprotect allows changing data in
Power dissipation
— Operating: 22 mA maximum
— Standby: 10 µA maximum
CE1#s and CE2s Chip Select
Power down features using CE1#s and CE2s
Data retention supply voltage: 1.5 to 3.3 volt
Byte data control: LB#s (DQ0–DQ7), UB#s (DQ8–DQ15)
erasing, enabling EEPROM emulation
bank
program or erase cycles
program command sequences
completion
reading array data
boot sectors, regardless of sector protect status
using programming equipment, to prevent any program or
erase operation within that sector
protected sectors in-system
Publication# 25790
Issue Date: January 9, 2002
Rev: A Amendment/0