at52bc3221a ATMEL Corporation, at52bc3221a Datasheet - Page 25

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at52bc3221a

Manufacturer Part Number
at52bc3221a
Description
32-mbit Flash 8-mbit Psram Stack Memory
Manufacturer
ATMEL Corporation
Datasheet

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PSRAM
Description
PSRAM
Features
Functional
Block Diagram
3466A–STKD–11/04
The Pseudo-SRAM (PSRAM) is an integrated memory based on a self-refresh DRAM array.
The device is offered with density of 8-Mbit organized as 512,288 words by 16 bits. It is
designed to be identical in operation and interface to the standard 6T SRAMS. The device is
designed for low standby, low operating current and includes a user configurable low-power
mode. Two chip selects (PCS1 and ZZ) and an output enable (POE) is available to allow for
easy memory expansion. Byte controls (PUB and PLB) allow the upper and lower bytes to be
accessed independently and can also be used to deselect the device. The deep sleep mode
reduces standby current drain while not retaining data in the array.
Fast Cycle Times
Very Low Standby Current
Very Low Operating Current
Memory Expansion with PCS1 and POE
TTL Compatible Three-state Output Driver
– T
– I
– 1.0 mA at 3.0 and 1 µs (Typical)
SB0
ACC
< 10 µA @ 3.0V
< 70 ns
I/O8 ~ I/O15
PCS1
P
P
P
P
WE
UB
Z Z
OE
LB
Addresses
I/O0 ~ I/O7
Row
Control Logic
Clk Gen
Data
Cont
Data
Cont
Data
Cont
Select
Row
Column Addresses
Precharge Circuit
Column select
Memory Array
I/O Circuit
PVCC
PGND
25

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