am49bds640ah Meet Spansion Inc., am49bds640ah Datasheet - Page 52

• Manufacturer Part Number: am49bds640ah
• Description: Stacked Multichip Package Mcp , Flash Memory And Psram Cmos 1.8 Volt-only Simultaneous Read/write, Burst Mode 64 Megabit 4m ? 16-bit Flash Memory, And 16 Mbit 1m ? 16-bit Psram
• Manufacturer: Meet Spansion Inc.

AC CHARACTERISTICS
Notes:
1. Figure shows total number of wait states set to seven cycles. The total number of wait states can be programmed from two
2. If any burst address occurs at a 64-word boundary, two additional clock cycle are inserted, and is indicated by RDY.
3. The device is in synchronous mode.
Addresses
Note: Figure assumes 7 wait states for initial access and automatic detect synchronous read. D0–D7 in data waveform indicate
the order of data within a given 8-word address range, from lowest to highest. Starting address in figure is the 7th address in
range (A6). See “Requirements for Synchronous (Burst) Read Operation”. The Set Configuration Register command sequence
has been written with A18=1; device will output RDY with valid data.
50
Addresses
cycles to seven cycles. Clock is set for active rising edge.
AVD#
Data
RDY
CE#
CLK
OE#
AVD#
Data
CE#
OE#
RDY
CLK
t
Hi-Z
t
AVC
ACS
Hi-Z
t
CR
t
t
t
CR
ACH
AAS
A6
1
Aa
t
t
AVC
t
CES
CAS
t
AVD
t
AVD
t
2
AAH
Figure 16. 8-word Linear Burst with Wrap Around
1
t
OE
7 cycles for initial access shown.
A D V A N C E
t
Figure 15. Synchronous Burst Mode Read
OE
3
7 cycles for initial access shown.
2
t
t
IACC
ACC
t
IACC
4
3
Am49BDS640AH
t
ACC
5
I N F O R M A T I O N
4
6
5
t
RACC
7
t
RDYS
6
D6
t
t
RACC
BDH
D7
7
t
RDYS
t
BACC
Da
D0
t
BDH
Da + 1
t
D1
BACC
December 5, 2003
D5
t
Da + n
t
CEZ
OEZ
D6
Hi-Z
Hi-Z