k4t1g084qa-zce60 Samsung Semiconductor, Inc., k4t1g084qa-zce60 Datasheet - Page 14

• Manufacturer Part Number: k4t1g084qa-zce60
• Description: 1gb A-die Ddr2 Sdram
• Manufacturer: Samsung Semiconductor, Inc.

1G A-die DDR2 SDRAM
OCD default characteristics
Notes:
1. Absolute Specifications (0°C ≤ T
2. Impedance measurement condition for output source dc current: V
3. Mismatch is absolute value between pull-up and pull-dn, both are measured at same temperature and voltage.
4. Slew rate measured from V
5. The absolute value of the slew rate as measured from DC to DC is equal to or greater than the slew rate as measured from AC to AC. This is guaran-
6. This represents the step size when the OCD is near 18 ohms at nominal conditions across all process and represents only the DRAM uncertainty.
Output slew rate load :
7. DRAM output slew rate specification applies to 400Mb/sec/pin, 533Mb/sec/pin and 667Mb/sec/pin speed bins.
8. Timing skew due to DRAM output slew rate mis-match between DQS / DQS and associated DQs is included in tDQSQ and tQHS specification.
Output impedance
Output impedance step size for OCD calibration
Pull-up and pull-down mismatch
Output slew rate
ues of V
Iol must be less than 23.4 ohms for values of V
teed by design and characterization.
OUT
between V
Description
DDQ
IL
and V
(AC) to V
CASE
DDQ
≤ +95°C; V
-280mV. Impedance measurement condition for output sink dc current: V
IH
(AC).
OUT
DD
(VOUT)
Output
between 0V and 280mV.
= +1.8V ±0.1V, V
Parameter
Sout
Page 14 of 28
DDQ
VTT
DDQ
= 1.7V; V
25 ohms
= +1.8V ±0.1V)
12.6
Min
1.5
0
0
OUT
Reference
Point
= 1420mV; (V
Nom
18
OUT
-V
DDQ
Max
23.4
1.5
)/Ioh must be less than 23.4 ohms for val-
4
5
DDQ
= 1.7V; V
DDR2 SDRAM
Rev. 1.1 Aug. 2005
ohms
ohms
ohms
Unit
V/ns
OUT
= 280mV; V
1,4,5,6,7,8
Notes
1,2,3
1,2
OUT
6
/