k4t51043qc-zle7 Samsung Semiconductor, Inc., k4t51043qc-zle7 Datasheet - Page 27

• Manufacturer Part Number: k4t51043qc-zle7
• Description: 512mb C-die Ddr2 Sdram
• Manufacturer: Samsung Semiconductor, Inc.

29. Input waveform timing with differential data strobe enabled MR[bit10]=0, is referenced from the input signal crossing at the V
tial data strobe crosspoint for a rising signal, and from the input signal crossing at the V
nal applied to the device under test.
30. Input waveform timing with differential data strobe enabled MR[bit10]=0, is referenced from the input signal crossing at the V
tial data strobe crosspoint for a rising signal and V
512Mb C-die DDR2 SDRAM
tRPST end point
tHZ,tRPST end point = 2*T1-T2
tHZ
DQS
DQS
Differential Input waveform timing
T1
T2
IL(dc)
tDS
<Test method for tLZ, tHZ, tRPRE and tRPST>
to the differential data strobe crosspoint for a falling signal applied to the device under test.
VOH + x mV
VOH + 2x mV
VOL + 2x mV
VOL + x mV
tDH
Page 27 of 29
VTT + 2x mV
VTT + x mV
VTT - x mV
VTT - 2x mV
tDS
tLZ,tRPRE begin point = 2*T1-T2
IL(ac)
tDH
level to the differential data strobe crosspoint for a falling sig-
T1
T2
V
V
V
V
V
V
V
tLZ
tRPRE begin point
DDQ
IH(ac)
IH(dc)
REF(dc)
IL(dc)
IL(ac)
SS
max
max
min
min
DDR2 SDRAM
Rev. 1.4 Aug. 2005
IH(ac)
IH(dc)
level to the differen-
level to the differen-