k4t51043qc-zle7 Samsung Semiconductor, Inc., k4t51043qc-zle7 Datasheet - Page 5
![no-image](/images/no-image-200.jpg)
k4t51043qc-zle7
Manufacturer Part Number
k4t51043qc-zle7
Description
512mb C-die Ddr2 Sdram
Manufacturer
Samsung Semiconductor, Inc.
Datasheet
1.K4T51043QC-ZLE7.pdf
(29 pages)
- Current page: 5 of 29
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512Mb C-die DDR2 SDRAM
x8 package pinout (Top View) : 60ball FBGA Package
Ball Locations (x8)
Notes:
1.
2.
3.
4.
VDDQ
VDDL
VDD
VDD
DQ6
DQ4
1
VSS
NC
G
A
B
C
D
E
F
H
K
L
J
Pins B3 and A2 have identical capacitance as pins B7 and A8.
For a read, when enabled, strobe pair RDQS & RDQS are
identical in function and timing to strobe pair DQS & DQS and
input masking function is disabled.
The function of DM or RDQS/RDQS are enabled by EMRS
command.
VDDL and VSSDL are power and ground for the DLL.
Top View (See the balls through the Package)
+
+
A10/AP
+
1
VSSQ
RDQS
VSSQ
VREF
CKE
DQ1
BA0
A12
NU/
A3
A7
2
2
+ : Depopulated Ball
RDQS
VDDQ
: Populated Ball
DQ3
VSS
VSS
3
DM/
WE
BA1
NC
A1
A5
A9
3
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A
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K
L
J
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VSSDL
6
VSSQ
VDDQ
DQ2
DQS
RAS
CAS
A11
NC
A2
A6
7
7
VSSQ
VSSQ
DQS
DQ0
A13
8
CS
CK
CK
A0
A4
A8
8
+
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9
VDDQ
VDDQ
DQ7
DQ5
VDD
ODT
VDD
VSS
9
DDR2 SDRAM
Rev. 1.4 Aug. 2005
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