k4s561633f Samsung Semiconductor, Inc., k4s561633f Datasheet
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k4s561633f
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k4s561633f Summary of contents
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... Please contact to the memory marketing team in samsung electronics when considering the use of a product contained herein for any specific purpose, such as medical, aerospace, nuclear, military, vehicular or undersea repeater use. GENERAL DESCRIPTION The K4S561633F is 268,435,456 bits synchronous high data rate Dynamic RAM organized 4,196,304 words by 16 bits, fabricated with SAMSUNG's high performance CMOS technol- ogy ...
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... K4S561633F - X(Z)E/N/G/C/L/F FUNCTIONAL BLOCK DIAGRAM Bank Select CLK ADD LCKE LRAS LCBR LWE CLK CKE CS Data Input Register Column Decoder Latency & Burst Length Programming Register LCAS LWCBR Timing Register RAS CAS WE L(U)DQM Mobile-SDRAM LWE LDQM ...
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... K4S561633F - X(Z)E/N/G/C/L/F Package Dimension and Pin Configuration *1 < Bottom View ...
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... K4S561633F - X(Z)E/N/G/C/L/F ABSOLUTE MAXIMUM RATINGS Parameter Voltage on any pin relative Voltage on V supply relative Storage temperature Power dissipation Short circuit current NOTES: Permanent device damage may occur if ABSOLUTE MAXIMUM RATINGS are exceeded. Functional operation should be restricted to recommended operating condition. ...
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... K4S561633F - X(Z)E/N/G/C/L/F DC CHARACTERISTICS Recommended operating conditions (Voltage referenced to V Parameter Symbol Operating Current I CC1 (One Bank Active CKE CC2 Precharge Standby Current in power-down mode I PS CKE & CLK CC2 CKE I N CC2 Input signals are changed one time during 20ns Precharge Standby Current ...
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... K4S561633F - X(Z)E/N/G/C/L/F AC OPERATING TEST CONDITIONS Parameter AC input levels (Vih/Vil) Input timing measurement reference level Input rise and fall time Output timing measurement reference level Output load condition VDDQ 1200 VOH (DC) = 2.4V, IOH = -2mA Output VOL (DC) = 0.4V, IOL = 2mA 30pF 870 Figure 1. DC Output Load Circuit ( ...
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... K4S561633F - X(Z)E/N/G/C/L/F OPERATING AC PARAMETER (AC operating conditions unless otherwise noted) Parameter Row active to row active delay RAS to CAS delay Row precharge time Row active time Row cycle time Last data in to row precharge Last data in to Active delay Last data in to new col. address delay Last data in to burst stop Col ...
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... K4S561633F - X(Z)E/N/G/C/L/F AC CHARACTERISTICS (AC operating conditions unless otherwise noted) Parameter CLK cycle time CAS latency=3 CLK cycle time CAS latency=2 CLK cycle time CAS latency=1 CLK to valid output delay CAS latency=3 CLK to valid output delay CAS latency=2 CLK to valid output delay CAS latency=1 ...
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... K4S561633F - X(Z)E/N/G/C/L/F SIMPLIFIED TRUTH TABLE COMMAND Register Mode Register Set Auto Refresh Entry Refresh Self Refresh Exit Bank Active & Row Addr. Read & Auto Precharge Disable Column Address Auto Precharge Enable Write & Auto Precharge Disable Column Address Auto Precharge Enable ...
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... K4S561633F - X(Z)E/N/G/C/L/F A. MODE REGISTER FIELD TABLE TO PROGRAM MODES Register Programmed with Normal MRS BA0 ~ BA1 Address A12~A10/AP "0" Setting for Function RFU Normal MRS Normal MRS Mode Test Mode CAS Latency A8 A7 Type Mode Register Set Reserved ...
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... K4S561633F - X(Z)E/N/G/C/L/F Partial Array Self Refresh 1. In order to save power consumption, Mobile SDRAM has PASR option. 2. Mobile SDRAM supports 3 kinds of PASR in self refresh mode : Full Array, 1/2 of Full Array and 1/4 of Full Array ...
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... K4S561633F - X(Z)E/N/G/C/L/F C. BURST SEQUENCE 1. BURST LENGTH = 4 Initial Address BURST LENGTH = 8 Initial Address ...