ic42s16101-7tig ETC-unknow, ic42s16101-7tig Datasheet - Page 26

no-image

ic42s16101-7tig

Manufacturer Part Number
ic42s16101-7tig
Description
512k X 16 Bit X 2 Banks 16-mbit Sdram
Manufacturer
ETC-unknow
Datasheet
IC42S16101
26
Write With Auto-Precharge
The write with auto-precharge command first executes a
burst write operation and then puts the selected bank in the
precharged state automatically. After the precharge
completes the bank goes to the idle state. Thus this
command performs a write command and a precharge
command in a single operation.
During this operation, the delay period (t
last burst data input and the completion of the precharge
operation differs depending on the CAS latency setting.
The delay (t
precharge operation starts one clock period after the last
burst data input.
CAS latency = 3, burst length = 4
CAS latency = 2, burst length = 4
COMMAND
COMMAND
COMMAND
READ WITH AUTO-PRECHARGE
READ WITH AUTO-PRECHARGE
READ WITH AUTO-PRECHARGE
DAL
CLK
CLK
CLK
I/O
I/O
I/O
) is t
RP
(BANK 0)
(BANK 0)
(BANK 0)
plus one CLK period. That is, the
READA 0
READA 0
READA 0
D
OUT
0
DAL
D
) between the
D
OUT
PRECHARGE START
OUT
PRECHARGE START
PRECHARGE START
0
1
(t
D
PQL=0
D
D
OUT
OUT
OUT
0
)
1
2
Therefore, the selected bank can be made active after a
delay of t
The selected bank must be set to the active state before
executing this command.
The auto-precharge function is invalid if the burst length is
set to full page.
D
D
D
OUT
OUT
OUT
CAS
CAS
CAS
CAS
CAS Latency
t
t
PQL
RP
1
2
3
DAL
t
DAL
.
t
D
D
RP
ACT 0
OUT
OUT
t
PQL
2
3
t
RP
Integrated Circuit Solution Inc.
D
ACT 0
OUT
3
1CLK
+t
3
RP
DR025-0F 01/17/2005
1CLK
+t
ACT 0
2
RP

Related parts for ic42s16101-7tig