m69aw048b STMicroelectronics, m69aw048b Datasheet - Page 18

• Manufacturer Part Number: m69aw048b
• Description: 32 Mbit 2m X16 3v Asynchronous Psram
• Manufacturer: STMicroelectronics

M69AW048B
Table 12. Write Mode AC Characteristics
Note: 1. Maximum value is applicable if E1 is kept Low without any address change. If needed by system operation, please contact your
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t
t
t
t
t
t
t
Symbol
AVAX
t
t
t
ELAX
t
t
t
t
t
t
t
WLWH
GHDZ
WHAX
WLBH
AVWL
BHAX
BLWH
EHAX
GHAV
GHEL
AXAV
BLBH
ELEH
AVBL
AVEL
t
t
t
t
t
t
t
t
BLBH2
DVWH
WHDZ
BHDZ
DVBH
DVEH
EHDZ
EHEL
2. Minimum value must be equal to or greater than the sum of write pulse (
3. Write pulse is defined from the falling edge of E1, W, or LB/UB, whichever occurs last.
4. Write recovery is defined from Write pulse is defined from the rising edge of E1, W, or LB/UB, whichever occurs first.
5. Applicable to any address change when E1 stays Low.
6. If G is Low after minimum t
7. If G is Low after new address input, the read cycle is initiated. In other words, G must be brought High at the same time or before
(1,2)
(1,2)
local ST representative for relaxation of the 1000ns limitation.
t
Low. Once the read cycle is initiated, new write pulse should be input after minimum Read Cycle Time is met.
new address valid. Once the read cycle is initiated, new write pulse should be input after minimum Read Cycle Time is met.
(2)
(2)
WHAX
(5)
(3)
(3)
(2)
(4)
(3)
(4)
(7)
(6)
(4)
(4)
(3)
(3)
or
t
BHAX
t
t
t
t
t
OHCL
t
Alt.
t
AXW
t
BWO
t
WRC
t
t
t
t
t
t
t
OES
OHZ
t
t
t
t
t
t
t
t
t
WC
BW
BW
WC
CW
WR
WP
WP
DH
DH
DH
AS
AS
AS
BR
DS
DS
DS
CP
).
Write Cycle Time
Address Valid to LB, UB Low
Address Valid to Chip Enable Low
Address Valid to Write Enable Low
Address Invalid Time for Write
LB, UB High to Address Transition
LB, UB High to Input High-Z
LB, UB Low to LB, UB High
LB, UB Low to LB, UB High for Page Access
LB, UB Low to Write Enable High
Input Valid to LB, UB High
Input Valid to Chip Enable High
Input Valid to Write Enable High
Chip Enable High to Address Transition
Chip Enable High to Input High-Z
Chip Enable High to Chip Enable Low
Write Cycle Time
Chip Enable Low to Chip Enable High
Output Enable High to Address Valid
Output Enable High to Chip Enable Low
Output Enable High to Output Hi-Z
Write Enable High to Address Transition
Write Enable High to Input High-Z
Write Enable Low to LB, UB High
Write Enable Low to Write Enable High
GHEL
, the read cycle is initiated. In other words, G must be brought High within 5ns after E1 is brought
Parameter
t
ELEH
,
t
WLBH
or
t
BLBH
Min
70
15
45
20
45
20
20
20
15
15
70
45
–5
15
45
45
0
0
0
0
0
0
0
M69AW048B
) and write recovery time (
1000
1000
1000
1000
Max
10
20
Unit
t
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
EHAX
,