m69aw048b STMicroelectronics, m69aw048b Datasheet - Page 9

• Manufacturer Part Number: m69aw048b
• Description: 32 Mbit 2m X16 3v Asynchronous Psram
• Manufacturer: STMicroelectronics

set to ‘0000h’, and the data of the fifth cycle is the
Power-Down Configuration data (see
5., Power-Down Configuration
cycle is written into a different address, the se-
quence is aborted. In the last cycle, a read is made
from the specific Power-Down Configuration ad-
dress (see
Addresses). The Power-Down Configuration data
Table 2. Operating Modes
Note: X = V
Table 3. Power-Down Modes
Standby (Deselected)
Power-Down
No Read
Lower Byte Read
Lower Byte Write
No Write
Upper Byte Read
Upper Byte Write
Word Read
Word Write
Deep Power-Down (Default)
4Mb PAR
8Mb PAR
16Mb PAR
1. Should not be kept in this logic condition for a period longer than 1µs.
2. Power-Down mode can be entered from Standby state and all DQ pins are in High-Z state. The Power-Down current and data re-
3. G can be V
Operation
tention depend on the selection of Power-Down programming.
a. Write pulse is initiated by E1 (E1 Controlled Write timing), or cycle time of the previous operation cycle is satisfied;
b. G stays V
(1)
IH
or V
(1)
(1)
Table 6., Power-Down Configuration
(2)
IL
.
Mode
IL
(1)
(1)
(1)
(1)
IL
during the Write operation if the following conditions are satisfied:
during the entire Write cycle.
V
V
V
V
V
V
V
V
V
E1
X
IH
IL
IL
IL
IL
IL
IL
IL
IL
V
V
V
V
V
V
V
V
V
E2
V
Data). If the fourth
IH
IH
IH
IH
IH
IH
IH
IH
IH
IL
V
V
V
V
V
V
V
V
W
X
X
IH
IH
IH
IH
IL
IL
IL
IL
V
V
V
V
V
V
V
V
IH
G
X
X
IH
IH
IH
Table
IL
IL
IL
IL
(3)
Data Retention
16 Mbit
V
V
V
V
LB
V
V
V
V
4 Mbit
8 Mbit
X
X
IH
IH
IH
IH
IL
IL
IL
IL
No
and address must correspond, otherwise the se-
quence is aborted.
When this sequence is performed to take the de-
vice from one PAR mode to another, the write data
may be lost. So, if a PAR mode is used, this se-
quence should be performed prior to any normal
read or write operations.
UB
V
V
V
V
V
V
V
V
X
X
IH
IH
IH
IH
IL
IL
IL
IL
Data Output
Data Output
Data Input
Data Input
DQ0-DQ7
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Data Output
Data Output
DQ8-DQ15
Data Input
Data Input
Retention Address
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Hi-Z
00000h – 3FFFFh
00000h – 7FFFFh
00000h – FFFFFh
N/A
M69AW048B
Output Disable
Output Disable
I
Standby (I
(I
Power-Down
CCP8,
Active (I
Active (I
Active (I
Active (I
Active (I
Active (I
CCPD,
Power
I
CCP16
I
CCP4,
CC
CC
CC
CC
CC
CC
SB
)
)
)
)
)
)
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)
)