mt18vddt12872dg-265 Micron Semiconductor Products, mt18vddt12872dg-265 Datasheet - Page 10

• Manufacturer Part Number: mt18vddt12872dg-265
• Description: 256mb, 512mb, 1gb, 2gb X72, Ecc, Dr 184-pin Ddr Rdimm
• Manufacturer: Micron Semiconductor Products

I
Table 11:
PDF: 09005aef80e1141d/Source: 09005aef80e11353
DD18C32_64_128_256x72D.fm - Rev. D 4/08 EN
Parameter/Condition
Operating one bank active-precharge current:
t
Address and control inputs changing once every two clock cycles
Operating one bank active-read-precharge current: BL = 2;
t
changing once per clock cycle
Precharge power-down standby current: All device banks idle; Power-
down mode;
Idle standby current: CS# = HIGH; All device banks idle;
CKE = HIGH; Address and other control inputs changing once per clock cycle;
V
Active power-down standby current: One device bank active; Power-
down mode;
Active standby current: CS# = HIGH; CKE = HIGH; One device bank active;
t
per clock cycle; Address and other control inputs changing once per clock
cycle
Operating burst read current: BL = 2; Continuous burst reads; One device
bank active; Address and control inputs changing once per clock cycle;
t
Operating burst write current: BL = 2; Continuous burst writes; One
device bank active; Address and control inputs changing once per clock
cycle;
cycle
Auto refresh current
Self refresh current: CKE ≤ 0.2V
Operating bank interleave read current: Four device bank interleaving
reads (BL = 4) with auto precharge;
Address and control inputs change only during active READ or WRITE
commands
DD
CK =
RC =
RC =
CK =
IN
= V
Specifications
t
t
t
t
t
RAS (MAX);
RC (MIN);
CK (MIN); DQ, DM, and DQS inputs changing once per clock cycle;
CK (MIN); I
CK =
REF
for DQ, DM, and DQS
t
CK (MIN); DQ, DM, and DQS inputs changing twice per clock
t
t
I
Values are for the MT46V16M8 DDR SDRAM only and are computed from values specified in the
128Mb (16 Meg x 8) component data sheet
CK =
CK =
DD
t
CK =
OUT
Specifications and Conditions – 256MB
t
Notes:
CK =
t
t
CK (MIN); CKE = LOW
CK (MIN); CKE = LOW
= 0mA
t
CK (MIN); I
t
CK (MIN); DQ, DM, and DQS inputs changing twice
1. Value calculated as one module rank in this operating condition; all other module ranks in
2. Value calculated reflects all module ranks in this operating condition.
I
DD
OUT
2P (CKE LOW) mode.
t
RC =
256MB, 512MB, 1GB, 2GB (x72, ECC, DR) 184-Pin DDR RDIMM
= 0mA; Address and control inputs
t
RC (MIN);
t
RC =
t
CK =
t
t
REFC =
REFC = 15.625µs
t
RC (MIN);
t
t
CK =
CK (MIN);
10
t
RFC (MIN)
t
CK (MIN);
Micron Technology, Inc., reserves the right to change products or specifications without notice.
Symbol -335
I
I
I
I
I
I
I
DD
DD
DD
I
I
DD
DD
DD
DD
I
I
I
DD
DD
DD
DD
DD
4W
3N
5A
2P
2F
3P
4R
0
1
5
6
7
1
1
2
2
1
2
2
2
1
2
2
1
1,152 1,017
1,242 1,107 1,107 1,107
1,287 1,197 1,152 1,152
1,287 1,152 1,107 1,107
4,770 3,960 3,960 3,960
3,222 2,997 2,952 2,952
810
450
900
54
90
54
Electrical Specifications
©2003 Micron Technology, Inc. All rights reserved
-262
810
450
900
54
90
54
-26A/
-265
972
720
360
810
54
90
36
-202
972
720
360
810
54
90
36
Units
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA