m393t2863az3 Samsung Semiconductor, Inc., m393t2863az3 Datasheet
m393t2863az3
Related parts for m393t2863az3
m393t2863az3 Summary of contents
Page 1
... Registered DIMMs DDR2 Registered SDRAM MODULE 240pin Registered Module based on 1Gb A-die INFORMATION IN THIS DOCUMENT IS PROVIDED IN RELATION TO SAMSUNG PRODUCTS, AND IS SUBJECT TO CHANGE WITHOUT NOTICE. NOTHING IN THIS DOCUMENT SHALL BE CONSTRUED AS GRANTING ANY LICENSE, EXPRESS OR IMPLIED, BY ESTOPPEL OR OTHERWISE, TO ANY INTELLECTUAL PROPERTY RIGHTS IN SAMSUNG PRODUCTS OR TECHNOLOGY. ALL INFORMATION IN THIS DOCUMENT IS PROVIDED ON AS " ...
Page 2
... Refresh Parameters by Device Density 13.2 Speed Bins and CL, tRCD, tRP, tRC and tRAS for Corresponding Bin 13.3 Timing Parameters by Speed Grade 14.0 Physical Dimensions ............................................................................................................... 20 14.1 128Mbx8 based 128Mx72 Module(1 Rank) (M393T2863AZ3/M393T2863AZA) 14.2 128Mbx8/256Mbx4 based 256Mx72 Module(2/1 Ranks) (M393T5663AZ3/M393T5663AZA/ M393T5660AZ3/M393T5660AZA) 14.3 st.512Mbx4 based 512Mx72 Module(2 Ranks) (M393T5168AZ0/M393T5166AZA) 15.0 240 Pin DDR2 Registered DIMM Clock Topology ..................................................................23 ...
Page 3
Registered DIMMs Revision History Revision Month Year 1.0 July 2005 - Initial Release 1.1 Aug. 2005 - Revised IDD Current Values 1.2 Sep. 2005 - Revised the Ordering Information DDR2 SDRAM History Rev. 1.2 Sep. 2005 ...
Page 4
... Registered DIMMs DDR2 Registered DIMM Ordering Information Part Number Density M393T2863AZ3-CD5/CC 1GB M393T2863AZA-CE6/D5/CC 1GB M393T5663AZ3-CD5/CC 2GB M393T5663AZA-CE6/D5/CC 2GB M393T5660AZ3-CD5/CC 2GB M393T5660AZA-CE6/D5/CC 2GB M393T5168AZ0-CD5/CC 4GB M393T5166AZA-CE6/D5/CC 4GB Note: “Z” of Part number(11th digit) stand for Lead-free products. Note: “3” of Part number(12th digit) stand for Dummy Pad PCB products. ...
Page 5
... RESET (Pin 18) is connected to both OE of PLL and Reset of register. 2. The Test pin (Pin 102) is reserved for bus analysis probes and is not connected on normal memory modules (DIMMs) 3. NC/Err_Out ( Pin 55) and NC/Par_In (Pin 68) are for optional function to check address and command parity. ...
Page 6
Registered DIMMs Input/Output Function Description Symbol Type Input CK0 Positive line of the differential pair of system clock inputs that drives input to the on-DIMM PLL. Input CK0 Negative line of the differential pair of system clock ...
Page 7
... Registered DIMMs Functional Block Diagram 1GB, 128Mx72 Module (M393T2863AZ3/M393T2863AZA) (populated as 1 rank of x8 DDR2 SDRAMs) RS0 DQS0 DQS0 DM0/DQS9 NC/DQS9 DM/ NU/ CS DQS DQS RDQS RDQS DQ0 I/O 0 DQ1 I DQ2 I/O 2 DQ3 I/O 3 DQ4 I/O 4 DQ5 I/O 5 DQ6 I/O 6 DQ7 I/O 7 DQS1 DQS1 DM1/DQS10 NC/DQS10 ...
Page 8
... Registered DIMMs 2GB, 256Mx72 Module (M393T5663AZ3/M393T5663AZA) (populated as 2 rank of x8 DDR2 SDRAMs) RS1 RS0 DQS0 DQS0 DM0/DQS9 NC/DQS9 DM/ NU/ CS DQS DQS DM/ RDQS RDQS RDQS DQ0 I/O 0 I/O 0 DQ1 I I/O 1 DQ2 I/O 2 I/O 2 DQ3 I/O 3 I/O 3 DQ4 I/O 4 I/O 4 DQ5 I/O 5 I/O 5 DQ6 I/O 6 I/O 6 DQ7 ...
Page 9
... Registered DIMMs 2GB, 256Mx72 Module (M393T5660AZ3/M393T5660AZA) (populated as 1 rank of x4 DDR2 SDRAMs) VSS RS0 DQS0 DQS0 DM CS DQS DQS DQ0 I/O 0 DQ1 I DQ2 I/O 2 DQ3 I/O 3 DQS1 DQS1 DM CS DQS DQS DQ8 I/O 0 DQ9 I DQ10 I/O 2 DQ11 I/O 3 DQS2 DQS2 DM CS DQS DQS ...
Page 10
... Registered DIMMs 4GB, 512Mx72 Module (M393T5168AZ0/M393T5166AZA) (populated as 2 rank of x4 DDR2 SDRAMs) VSS RS1 RS0 DQS0 DQS0 DM CS DQS DQS DM/ CS DQS DQS DQ0 I/O 0 I/O 0 DQ1 I I/O 1 D18 DQ2 I/O 2 I/O 2 DQ3 I/O 3 I/O 3 DQS1 DQS1 DM CS DQS DQS DM/ ...
Page 11
Registered DIMMs Absolute Maximum DC Ratings Symbol Parameter Voltage on V pin relative Voltage on V pin relative DDQ DDQ Voltage on V pin relative DDL ...
Page 12
Registered DIMMs Operating Temperature Condition Symbol Parameter TOPER Operating Temperature Note : 1. Operating Temperature is the case surface temperature on the center/top side of the DRAM. For the measurement conditions, please refer to JESD51.2 standard. At ...
Page 13
Registered DIMMs IDD Specification Parameters Definition (IDD values are for full operating range of Voltage and Temperature) Symbol Proposed Conditions Operating one bank active-precharge current CK(IDD RC(IDD), t RAS ...
Page 14
... Registered DIMMs Operating Current Table(1-1) M393T2863AZ3/M393T2863AZA : 1GB(128Mx8 *9) Module Symbol E6 (DDR2-667@CL=5) IDD0 TBD IDD1 TBD IDD2P TBD IDD2Q TBD IDD2N TBD IDD3P-F TBD IDD3P-S TBD IDD3N TBD IDD4W TBD IDD4R TBD IDD5B TBD IDD6* Normal TBD IDD7 TBD */IDD6 = DRAM current + standby current of PLL and Register ** Module IDD was calculated on the basis of component IDD and can be differently measured according to DQ loading cap ...
Page 15
... TBD IDD5B TBD IDD6* Normal TBD IDD7 TBD */IDD6 = DRAM current + standby current of PLL and Register ** Module IDD was calculated on the basis of component IDD and can be differently measured according to DQ loading cap. D5 (DDR2-533@CL=4) CC (DDR2-400@CL=3) 2,150 2,070 2,370 2,310 910 850 1,470 ...
Page 16
... Registered DIMMs Input/Output Capacitance Parameter Part-Number Input capacitance, CK and CK Input capacitance, CKE and CS Input capacitance, Addr,RAS,CAS,WE Input/output capacitance, DQ, DM, DQS, DQS * DM is internally loaded to match DQ and DQS identically. Min Max Min Max Symbol M393T2863AZ3 M393T5663AZ3 M393T2863AZA M393T5663AZA CCK - CI1 - ...
Page 17
Registered DIMMs Electrical Characteristics & AC Timing for DDR2-667/533/400 (0 qC < T < 1.8V + 0.1V; V OPER DDQ Refresh Parameters by Device Density Parameter Refresh to active/Refresh command time Average periodic ...
Page 18
Registered DIMMs Parameter DQS input high pulse width DQS input low pulse width DQS falling edge to CK setup time DQS falling edge hold time from CK Mode register set command cycle time Write postamble Write preamble ...
Page 19
... Registered DIMMs Physical Dimensions 128Mbx8 based 128Mx72 Module(1 Rank) (M393T2863AZ3/M393T2863AZA) (2) 2.50 63.00 5.00 4.00 2.50 1.50±0.10 Detail A The used device is 128M x8 DDR2 SDRAM, FBGA. DDR2 SDRAM Part NO : K4T1G084QA 133.35 131.35 128.95 N/A (for x64) ECC (for x72) PLL B A 55.00 4.00 0.80±0.05 3.80 0.20 1.00 Detail B DDR2 SDRAM Units : Millimeters 2 ...
Page 20
... Registered DIMMs 128Mbx8/256Mbx4 based 256Mx72 Module(2/1 Ranks) (M393T5663AZ3 / M393T5663AZA / M393T5660AZ3 / M393T5660AZA) (for x64) (for x72) (2) 2.50 63.00 5.00 4.00 2.50 1.50±0.10 Detail A The used device is 128M x8 / 256M x4 DDR2 SDRAM, FBGA. DDR2 SDRAM Part NO : K4T1G084QA / K4T1G044QA 133.35 131.35 128.95 N/A ECC PLL B A 55.00 4.00 0.80±0.05 3.80 0.20 1.00 Detail B ...
Page 21
... Registered DIMMs st. 512Mbx4 based 512Mx72 Module(2 Ranks) (M393T5168AZ0/M393T5166AZA) (2) 2.50 63.00 5.00 4.00 2.50 1.50±0.10 Detail A The used device is st.512M x4 DDR2 SDRAM. DDR2 SDRAM Part NO : K4T2G064QA / K4T2G264QA 133.35 131.35 128.95 PLL B A 55.00 4.00 0.80±0.05 3.80 0.20 1.00 Detail B DDR2 SDRAM Units : Millimeters 6.75 mm 30.00 4.05 max 1.27 ± 0.10 3.00 4.00 Rev. 1.2 Sep. 2005 ...
Page 22
Registered DIMMs 240 Pin DDR2 Registered DIMM Clock Topology CK0 120 ohms CK0 120 ohms C Note : 1. The clock delay from the input of the PLL clock to the input of any DDR2 SDRAM or ...