m393t6553bg Samsung Semiconductor, Inc., m393t6553bg Datasheet - Page 2

• Manufacturer Part Number: m393t6553bg
• Description: Ddr2 Registered Sdram Module 240pin Registered Module Based On 512mb B-die 72-bit Ecc
• Manufacturer: Samsung Semiconductor, Inc.

DDR2 Registered DIMM Ordering Information
Note: “Z” and “Y” of Part number(11th digit) stand for Lead-free products.
Note: “3” of Part number(12th digit) stand for Dummy Pad PCB products.
Features
Address Configuration
512MB, 1GB, 2GB Registered DIMMs
Note: For detailed DDR2 SDRAM operation, please refer to Samsung’s Device operation & Timing diagram.
• Performance range
• JEDEC standard 1.8V ± 0.1V Power Supply
• VDDQ = 1.8V ± 0.1V
• 200 MHz f
• 4 Banks
• Posted CAS
• Programmable CAS Latency: 3, 4, 5
• Programmable Additive Latency: 0, 1 , 2 , 3 and 4
• Write Latency(WL) = Read Latency(RL) -1
• Burst Length: 4 , 8(Interleave/nibble sequential)
• Programmable Sequential / Interleave Burst Mode
• Bi-directional Differential Data-Strobe (Single-ended data-strobe is an optional feature)
• Off-Chip Driver(OCD) Impedance Adjustment
• On Die Termination
• Average Refresh Period 7.8us at lower than T
• Serial presence detect with EEPROM
• DDR2 SDRAM Package: 60ball FBGA - 128Mx4/64Mx8
• All of Lead-free products are compliant for RoHS
CL-tRCD-tRP
Speed@CL3
Speed@CL4
Speed@CL5
M393T6553BG(Z)3-CD5/CC
M393T6553BG(Z)0-CD5/CC
M393T2953BG(Z)3-CD5/CC
M393T2953BG(Z)0-CD5/CC
M393T2950BG(Z)3-CD5/CC
M393T2950BG(Z)0-CD5/CC
M393T5750BS(Y)3-CD5/CC
M393T5750BS(Y)0-CD5/CC
128Mx4(512Mb) based Module
64Mx8(512Mb) based Module
Part Number
Organization
CK
for 400Mb/sec/pin, 267MHz f
D5(DDR2-533)
4-4-4
400
533
-
Density
512MB
512MB
1GB
1GB
1GB
1GB
2GB
2GB
Row Address
CC(DDR2-400)
CK
A0-A13
A0-A13
3-3-3
400
400
for 533Mb/sec/pin
CASE
-
Organization
128Mx72
128Mx72
128Mx72
128Mx72
256Mx72
256Mx72
64Mx72
64Mx72
85qC, 3.9us at 85qC < T
Mbps
Mbps
Mbps
Unit
CK
Column Address
A0-A9,A11
128Mx4(K4T51043QB)*18EA
128Mx4(K4T51043QB)*18EA
128Mx4(K4T51043QB)*36EA
128Mx4(K4T51043QB)*36EA
A0-A9
64Mx8(K4T51083QB)*18EA
64Mx8(K4T51083QB)*18EA
Component Composition
64Mx8(K4T51083QB)*9EA
64Mx8(K4T51083QB)*9EA
CASE
< 95qC
Bank Address
BA0-BA1
BA0-BA1
Rev. 1.3 Aug. 2005
Number of Rank
DDR2 SDRAM
1
1
2
2
1
1
2
2
Auto Precharge
A10
A10
Height
30mm
30mm
30mm
30mm
30mm
30mm
30mm
30mm