m470t6464az3 Samsung Semiconductor, Inc., m470t6464az3 Datasheet - Page 2

• Manufacturer Part Number: m470t6464az3
• Description: Ddr2 Unbuffered Sodimm 200pin Unbuffered Sodimm Based On 1gb A-die 64-bit Non-ecc
• Manufacturer: Samsung Semiconductor, Inc.

SODIMM
Table of Contents
1.0 DDR2 Unbuffered DIMM Ordering Information ......................................................................... 4
2.0 Features ........................................................................................................................................ 4
3.0 Address Configuration ................................................................................................................ 4
4.0 Pin Configurations (Front side/Back side) ................................................................................ 5
5.0 Pin Description ............................................................................................................................ 5
6.0 Input/Output Function Description ............................................................................................ 6
7.0 Functional Block Diagram : ........................................................................................................ 7
8.0 Absolute Maximum DC Ratings ................................................................................................ 10
9.0 AC & DC Operating Conditions ................................................................................................ 10
10.0 IDD Specification Parameters Definition ............................................................................... 12
11.0 Operating Current Table ......................................................................................................... 13
12.0 Input/Output Capacitance ....................................................................................................... 15
13.0 Electrical Characteristics & AC Timing for DDR2-667/533/400 ............................................ 15
14.0 Physical Dimensions : ............................................................................................................. 18
7.1 1GB, 128Mx64 Module - M470T2864AZ3
7.2 512MB, 64Mx64 Module - M470T6464AZ3
7.3 2GB, 256Mx64 Module - M470T5669AZ0
9.1 Recommended DC Operating Conditions (SSTL - 1.8)
9.2 Operating Temperature Condition
9.3 Input DC Logic Level
9.4 Input AC Logic Level
9.5 AC Input Test Conditions
11.1 M470T2864AZ3 : 128Mx64 1GB Module
11.2 M470T6464AZ3: 64Mx64 512MB Module
11.3 M470T5669AZ0: 256Mx64 1GB Module
13.1 Refresh Parameters by Device Density
13.2 Speed Bins and CL, tRCD, tRP, tRC and tRAS for Corresponding Bin
13.3 Timing Parameters by Speed Grade
14.1 64Mbx16 based 128Mx64 Module (2 Rank) - M470T2864AZ3
14.2 64Mbx16 based 64Mx64 Module (1 Rank) - M470T6464AZ3
14.3 st.256Mbx8 based 256Mx64 Module (2 Ranks) - M470T5669AZ0
.................................................................................................................. 11
.................................................................................................................. 11
............................................................................................................ 11
................................................................................................ 11
.......................................................................................... 16
.......................................................................................... 7
.......................................................................................... 9
........................................................................................ 13
....................................................................................... 14
........................................................................................ 8
...................................................................................... 15
..................................................................................... 13
2 of 20
..................................................................... 10
........................................................... 19
......................................................... 18
.................................................... 20
........................................... 15
Rev. 1.4 March 2007
DDR2 SDRAM