hys64t256022hdl-5-a Infineon Technologies Corporation, hys64t256022hdl-5-a Datasheet - Page 20

• Manufacturer Part Number: hys64t256022hdl-5-a
• Description: 200-pin So-dimm Ddr2 Sdram Modules
• Manufacturer: Infineon Technologies Corporation

Table 12
Parameter
Exit Self-Refresh to non-Read
command
Exit Self-Refresh to Read
command
1) For details and notes see the relevant INFINEON component data sheet
2)
3) Timing that is not specified is illegal and after such an event, in order to guarantee proper operation, the DRAM must be
4) Timings are guaranteed with CK/CK differential Slew Rate of 2.0 V/ns. For DQS signals timings are guaranteed with a
5) The CK / CK input reference level (for timing reference to CK / CK) is the point at which CK and CK cross.
6) Inputs are not recognized as valid until
7) The output timing reference voltage level is
8)
9) 8 bank device Sequential Activation Restriction. No more than 4 banks may be activated in a rolling
10) x16 (2k page size), not on 256 Mbit component
Data Sheet
V
powered down and then restarted through the specified initialization sequence before normal operation can continue.
differential Slew Rate of 2.0 V/ns in differential strobe mode and a Slew Rate of 1 V/ns in single ended mode. For other
Slew Rates see Chapter 8 of this data sheet. Timings are further guaranteed for normal OCD drive strength (EMRS(1) A1
= 0) under the Reference Load for Timing Measurements according to Chapter 8.1 only.
The DQS / DQS, RDQS/ RDQS, input reference level is the crosspoint when in differential strobe mode;
The input reference level for signals other than CK/CK, DQS / DQS, RDQS / RDQS is defined in Chapter 8.3 of this data
sheet.
recognized as low.
x4 & x8 (1k page size)
DDQ
= 1.8 V ± 0.1 V;
Timing Parameter by Speed Grade - DDR2-400 & DDR2-533 (cont’d)
V
DD
= 1.8 V ± 0.1 V. See notes
Symbol
t
t
XSNR
XSRD
V
REF
V
stabilizes. During the period before
TT
. .
DDR2–533
Min.
t
200
RFC
3)4)5)6)
+10
20
Max.
—
—
Small Outline DDR2 SDRAM Modules
Electrical CharacteristicsAC Characteristics
DDR2–400
Min.
t
200
HYS64T256022HDL–[3.7/5]–A
RFC
V
REF
+10
stabilizes, CKE = 0.2 x
Max.
—
—
09092004-D30U-XRMR
t
FAW
Rev. 1.2, 2005-08
window.
Unit Note
ns
t
CK
V
DDQ
1)2)3)4)
5)6)7)
is