hys64t256022hdl-5-a Infineon Technologies Corporation, hys64t256022hdl-5-a Datasheet - Page 7

• Manufacturer Part Number: hys64t256022hdl-5-a
• Description: 200-pin So-dimm Ddr2 Sdram Modules
• Manufacturer: Infineon Technologies Corporation

2
2.1
The pin configuration of the Small Outline DDR2 SDRAM DIMM is listed by function in
abbreviations used in columns Pin and Buffer Type are explained in
numbering is depicted in
Table 5
Pin or Ball No.
Clock Signals
30
164
32
166
79
80
Control Signals
110
115
108
113
109
Address Signals
Data Sheet
Pin Configuration and Block Diagrams
Pin Configuration
Pin Configuration of SO-DIMM
Figure 1
Name
CK0
CK1
CK0
CK1
CKE0
CKE1
NC
S0
S1
NC
RAS
CAS
WE
Pin
Type
I
I
I
I
I
I
NC
I
I
NC
I
I
I
Buffer
Type
SSTL
SSTL
SSTL
SSTL
SSTL
SSTL
—
SSTL
SSTL
—
SSTL
SSTL
SSTL
Pin Configuration and Block DiagramsPin Configuration
7
Function
Clock Signals 2:0, Complement Clock Signals 2:0
The system clock inputs. All address and command
lines are sampled on the cross point of the rising edge
of CK and the falling edge of CK. A Delay Locked
Loop (DLL) circuit is driven from the clock inputs and
output timing for read operations is synchronized to
the input clock.
Clock Enable Rank 1:0
Activates the DDR2 SDRAM CK signal when HIGH
and deactivates the CK signal when LOW. By
deactivating the clocks, CKE LOW initiates the Power
Down Mode or the Self Refresh Mode.
Note: 2 Ranks module
Not Connected
Note: 1-rank module
Chip Select Rank 1:0
Enables the associated DDR2 SDRAM command
decoder when LOW and disables the command
decoder when HIGH. When the command decoder is
disabled, new commands are ignored but previous
operations continue. Rank 0 is selected by S0; Rank
1 is selected by S1. Ranks are also called "Physical
banks".2 Ranks module
Not Connected
Note: 1-rank module
Row Address Strobe
When sampled at the cross point of the rising edge of
CK,and falling edge of CK, RAS, CAS and WE define
the operation to be executed by the SDRAM.
Column Address Strobe
Write Enable
Small Outline DDR2 SDRAM Modules
Table 6
HYS64T256022HDL–[3.7/5]–A
and
Table 7
Table 5
09092004-D30U-XRMR
respectively. The pin
Rev. 1.2, 2005-08
(200 pins). The