m391t2863eh3-ce7/f7/e6 Samsung Semiconductor, Inc., m391t2863eh3-ce7/f7/e6 Datasheet - Page 14

• Manufacturer Part Number: m391t2863eh3-ce7/f7/e6
• Description: Ddr2 Unbuffered Sdram Module
• Manufacturer: Samsung Semiconductor, Inc.

UDIMM
10.2 Operating Temperature Condition
Note :
1. Operating Temperature is the case surface temperature on the center/top side of the DRAM. For the measurement conditions, please refer to
2. At 85 - 95 °C operation temperature range, doubling refresh commands in frequency to a 32ms period ( tREFI=3.9 us ) is required, and to enter to self
10.3 Input DC Logic Level
10.4 Input AC Logic Level
10.5 AC Input Test Conditions
Notes:
1. Input waveform timing is referenced to the input signal crossing through the V
2. The input signal minimum slew rate is to be maintained over the range from V
3. AC timings are referenced with input waveforms switching from V
JESD51.2 standard.
refresh mode at this temperature range, an EMRS command is required to change internal refresh rate.
max for falling edges as shown in the below figure.
transitions.
V
SWING(MAX)
Symbol
Symbol
V
V
Symbol
V
V
SLEW
IH
IH
V
Symbol
IL
IL
T
REF
(DC)
(AC)
(AC)
(DC)
OPER
Input reference voltage
Input signal maximum peak to peak swing
Input signal minimum slew rate
DC input logic high
AC input logic high
DC input logic low
AC input logic low
Parameter
V
Parameter
Falling Slew =
SWING(MAX)
Operating Temperature
Parameter
delta TF
Condition
V
REF
< AC Input Test Signal Waveform >
- V
delta TF
IL
(AC) max
V
V
IL
REF
REF
(AC) to V
14 of 25
Min.
Min.
- 0.3
+ 0.200
+ 0.125
DDR2-667, DDR2-800
delta TR
IH
IH/IL
REF
(AC) on the positive transitions and V
Rising Slew =
(AC) level applied to the device under test.
to V
Rating
0 to 95
IH
V
V
(AC) min for rising edges and the range from V
V
REF
REF
0.5 * V
DDQ
Max.
Max.
Value
- 0.200
- 0.125
1.0
1.0
+ 0.3
V
DDQ
IH
(AC) min - V
V
V
V
V
V
V
V
delta TR
DDQ
IH
IH
REF
IL
IL
SS
(DC) max
(AC) max
(AC) min
(DC) min
REF
Units
°C
Rev. 1.01 October 2008
Units
Units
Units
V/ns
V
V
V
V
IH
V
V
(AC) to V
DDR2 SDRAM
IL
(AC) on the negative
Notes
1, 2
REF
Notes
Notes
Notes
2, 3
1
1
to V
IL
(AC)