mt9vddf6472phy-335 Micron Semiconductor Products, mt9vddf6472phy-335 Datasheet - Page 17

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mt9vddf6472phy-335

Manufacturer Part Number
mt9vddf6472phy-335
Description
256mb, 512mb X72, Ecc, Pll, Sr 200-pin Ddr Sodimm
Manufacturer
Micron Semiconductor Products
Datasheet
Figure 5:
PDF: 09005aef81eef7d4/Source: 09005aef81eef0df
DDF9C32_64x72PH_2.fm - Rev. A 1/06 EN
Pull-Up Characteristics
34. The voltage levels used are derived from a minimum V
35. V
36. During initialization, V
37. Random addressing changing and 50 percent of data changing at every transfer.
38. Random addressing changing and 100 percent of data changing at every transfer.
39. CKE must be active (high) during the entire time a refresh command is executed.
40. I
41. Leakage number reflects the worst case leakage possible through the module pin, not
42. When an input signal is HIGH or LOW, it is defined as a steady state logic HIGH or
-100
-120
-140
-160
-180
-200
-20
-40
-60
-80
load. In practice, the voltage levels obtained from a properly terminated bus will pro-
vide significantly different voltage values.
Alternatively, V
0Vs, provided a minimum of 42Ω of series resistance is used between the V
and the input pin.
That is, from the time the AUTO REFRESH command is registered, CKE must be
active at each rising clock edge, until
I
remain stable. Although I
what each memory device contributes.
LOW.
DD
DD
0
DD
0.0
2N specifies the DQ, DQS, and DM to be driven to a valid high or low logic level.
2Q is similar to I
and V
DD
256MB, 512MB: (x72, ECC, PLL, SR) 200-Pin DDR SODIMM
0.5
Q must track each other.
TT
may be 1.35V maximum during power up, even if V
DD
1.0
V
2F except I
DD
DD
Q - V
DD
Q, V
17
OUT
2F, I
(V)
TT
1.5
DD
, and V
DD
2N, and I
2Q specifies the address and control inputs to
Micron Technology, Inc., reserves the right to change products or specifications without notice.
t
REF later.
REF
2.0
must be equal to or less than V
DD
2Q are similar, I
2.5
DD
level and the referenced test
©2005 Micron Technology, Inc. All rights reserved.
DD
2F is “worst case.”
DD
/V
DD
DD
TT
+ 0.3V.
Q are
supply
Notes

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