mt9vddf6472phy-335 Micron Semiconductor Products, mt9vddf6472phy-335 Datasheet - Page 18
![no-image](/images/no-image-200.jpg)
mt9vddf6472phy-335
Manufacturer Part Number
mt9vddf6472phy-335
Description
256mb, 512mb X72, Ecc, Pll, Sr 200-pin Ddr Sodimm
Manufacturer
Micron Semiconductor Products
Datasheet
1.MT9VDDF6472PHY-335.pdf
(26 pages)
PLL Specifications
Table 12:
PDF: 09005aef81eef7d4/Source: 09005aef81eef0df
DDF9C32_64x72PH_2.fm - Rev. A 1/06 EN
Parameter
Operating Clock Frequency
Input Duty Cycle
Stabilization Time
Cycle to Cycle Jitter
Static Phase Offset
Output Clock Skew
Period Jitter
Half-Period Jitter
Input Clock Slew Rate
Output Clock Slew Rate
PLL Clock Driver Timing Requirements and Switching Characteristics
Note: 1
Notes: 1. The timing and switching specifications for the PLL listed above are critical for proper
2. The PLL must be able to handle spread spectrum induced skew.
3. Operating clock frequency indicates a range over which the PLL must be able to lock,
4. Stabilization time is the time required for the integrated PLL circuit to obtain phase
5. Static Phase Offset does not include Jitter.
6. Period Jitter and Half-Period Jitter specifications are separate specifications that must
7. The output slew rate is determined from the IBIS model:
operation of DDR SDRAM modules. These are meant to be a subset of the parameters
for the specific device used on the module. Detailed information for this PLL is avail-
able in JEDEC Standard JESD82.
but in which it is not required to meet the other timing parameters. (Used for low-
speed system debug.)
lock of its feedback signal to its reference signal after power up.
be met independently of each other.
Symbol
t
t
t
JIT
CDCV857
t
STAB
JIT
t
t
t
JIT
f
t
SK
t
LS
CK
DC
LS
∅
HPER
PER
CC
O
O
I
GND
V
DD
256MB, 512MB: (x72, ECC, PLL, SR) 200-Pin DDR SODIMM
Min
-100
-75
-50
-75
1.0
1.0
60
40
-
-
V
18
0°C ≤ T
dd
Nominal
= +2.5V ±0.2V
V
0
-
-
-
-
-
-
-
-
-
V
A
CK
CK
≤ +70°C
R=60
Micron Technology, Inc., reserves the right to change products or specifications without notice.
R=60
Ω
Ω
V
DD
/2
Max
170
100
100
100
75
50
75
60
4
2
©2005 Micron Technology, Inc. All rights reserved.
PLL Specifications
Units
MHz
V/ns
V/ns
ms
%
ps
ps
ps
ps
ps
notes
2, 3
4
5
6
6
7