saa5281 NXP Semiconductors, saa5281 Datasheet - Page 2

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saa5281

Manufacturer Part Number
saa5281
Description
Integrated Video Input Processor And Teletext Decoder Ivt1.8
Manufacturer
NXP Semiconductors
Datasheet

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Philips Semiconductors
FEATURES
QUICK REFERENCE DATA
ORDERING INFORMATION
1996 Nov 04
V
I
V
V
f
T
SAA5281P
SAA5281ZP
SAA5281GP
DD
xtal
TYPE NUMBER
Complete Teletext and VPS decoding in a single
package
Built-in 8K
Enhanced mode allows 7 Fastext pages and 8 pages of
TOP to be captured
Ability to request only subtitle pages
Acquisition and decoding of VPS data
Data valid output available to indicate reception of
error-free VPS or packet 8/30/2 data
Software and hardware compatible with SAA5246 and
SAA5248
Meshing display within boxes
Separate data checking algorithms and pointers for
each acquisition channel
24 : 18 Hamming checker
Automatic packet 26 extension character processing
Indication of Line 23 for external use
13.5 MHz clock output to drive external microcontroller
Detection of Spanish transmissions to disable
flicker-stopper
Compatible with Philips’ one-chip TV IC (TDA836X) for
scan-locking applications.
amb
DD
sync
vid(p-p)
Integrated Video input processor and
Teletext decoder (IVT1.8*)
SYMBOL
8 memory for up to 8 page storage
supply voltage
supply current
sync voltage amplitude
video input voltage amplitude
(peak-to-peak value)
crystal frequency
operating ambient temperature
SDIP52
QFP64
NAME
DIP48
plastic shrink dual in-line package; 32 leads (400 mil)
plastic shrink dual in-line package; 52 leads (600 mil)
plastic quad flat package; 64 leads
(lead length 1.95 mm); body 14
PARAMETER
DESCRIPTION
2
DESCRIPTION
The IVT1.8* is a single-chip Teletext decoder IC for
decoding 625-line based World System Teletext
transmissions. The device is based on IVT1.0VPS and has
reception facilities for the 5 MHz biphase VPS signal. It is
intended for use in video recorders, in particular to
implement the VPT facility (VCR programming via
Teletext). With suitable software both VPT standards
(EBU PDC System A and System B) can be
accommodated to allow operation from any European VPT
transmission. Automatic processing of packet 26
transmissions is also possible. No external memory is
required as an 8K
8 page storage. An enhanced mode allows 7 Fastext
pages to be stored, with one chapter used to store
extension packets.
PACKAGE
4.5
0.1
0.7
20
20
MIN.
2.8 mm
5.0
75
0.3
1.0
27
8 DRAM is included on-chip for up to
TYP.
Preliminary specification
5.5
150
0.6
1.4
+70
MAX.
SOT240-1
SOT247-1
SOT319-2
VERSION
SAA5281
V
mA
V
V
MHz
C
UNIT

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