saa569x NXP Semiconductors, saa569x Datasheet - Page 49

• Manufacturer Part Number: saa569x
• Description: Enhanced Tv Microcontrollers With On-screen Display Osd
• Manufacturer: NXP Semiconductors

Philips Semiconductors
18.4
For full details on the UART operation, refer to “Handbook
IC20, 80C51-Based 8-bit Microcontrollers” .
Remark: f
microcontroller clock frequency (12 MHz). The SAA56xx
family of devices uses both clock edges, so the division
factor is 6 instead of 12.
The serial port can operate with different baud rates,
depending on its mode:
When Timer 1 is configured for timer operation it is normal
to use the 8-bit auto-reload mode. However, 16-bit mode
can be used for very low baud rates. In this case the
Timer 1 interrupt will need to do a 16-bit software reload.
Timer 2: will be placed in baud generator mode when the
RCLK0 and/or TCLK0 bits in the T2CON register are set.
When Timer 2 is clocked internally the baud rate
=
Where T2H, T2L is the decimal value of the 16-bit contents
of the T2H, T2L SFRs.
When Timer 2 is configured as a counter, using pin T2
then the baud rate is the Timer 2 overflow rate divided
by 16
2002 May 06
--------------------------------------------------------------------- -
16
Mode 0 (SM0 = 0, SM1 = 0): in shift register mode the
baud rate is fixed at
Mode 2 (SM0 = 0, SM1 = 0): in this fixed baud rate
mode, the baud rate is determined by the SMOD bit in
the PCON register: baud rate =
Modes 1 (SM0 = 0, SM1 = 1) and 3 (SM0 = 1,
SM1 = 1): in these modes, the baud rate is variable and
is determined by either Timer 1 or Timer 2;
see Chapter 13.
Timer 1: can be used in either Timer or Counter mode
where the baud rate is determined by the timer overflow
rate and the value of SMOD as follows:
i.e. baud rate =
where T1H is the decimal value of the register contents.
Enhanced TV microcontrollers with
On-Screen Display (OSD)
baud rate
UART baud rates
65536
clk
used in the following calculations refers to the
=
f
clk
–
2
----------------- -
SMOD
T2H, T2L
32
2
----------------- -
SMOD
32
1
6
f
Timer 1 overflow rate
clk
.
----------------------------------------- -
6
:
256 T1H
f
2
----------------- -
clk
SMOD
–
32
f
clk
49
19 LED SUPPORT
Port pins P0.5 and P0.6 have an 8 mA current sinking
capability to enable LEDs in series with current limiting
resistors to be driven directly, without the need for
additional buffering circuits.
20 EXTERNAL SRAM AND ROM INTERFACE
The external address/data bus of the 80C51
microprocessor may be interfaced to:
The application circuit can be achieved using either the
multiplexed address and data I/O or the de-multiplexed
address and data I/O.
External SRAM data memory: It is possible to interface
up to 256 kbytes of external data memory using pins
RAMBK<1:0> and A15_BK. Each of the four Data memory
banks is selected by RAMBK<1:0> (SFR ROMBK<4:3>);
see Table 21.
Figure 12 shows an example of the interfacing
connections for external SRAM data memory; see also
Chapter 30.
Table 21 RAMBK selection
External program ROM (pin EA tied LOW): for the
SAA567x; SAA569x family of devices only, it is possible to
interface up to 256 kbytes of external program ROM,
which is addressed using the contiguous address bus.
Figure 13 shows the interface connections.
Remark: pins A15_BK, ROMBK0, ROMBK1 and
ROMBK2 are used for emulating the external program
ROM.
Internal program ROM (pin EA tied HIGH): for the
SAA567x; SAA569x family of devices only, there is
rollover to external ROM which allows up to a maximum of
256 kbytes of program ROM (e.g. 192 kbytes internal plus
64 kbytes external). Figures 14 show the interface
connections.
RAMBK<1:0>
Additional SRAM Data memory for multi-page
acquisition applications
External Program ROM.
00
01
10
11
Bank 0
Bank 1
Bank 2
Bank 3
BANK
SAA567x; SAA569x
Objective specification
ADDRESS RANGE
128 to 192 kbytes
192 to 256 kbytes
64 to 128 kbytes
0 to 64 kbytes
EXTERNAL