saa5700 NXP Semiconductors, saa5700 Datasheet - Page 5

• Manufacturer Part Number: saa5700
• Description: Chinese Character System Teletext Ccst Decoder
• Manufacturer: NXP Semiconductors

Philips Semiconductors
1997 May 16
RA4
V
n.c.
V
RA5
RA6
RA7
n.c.
RA8
RA9
RAS
n.c.
WE
i.c.
RD0
RD1
V
V
n.c.
RD2
RD3
CAS
RA10
RD7
RD6
RD5
RD4
RESET
DDA
SCL
SDA
DCL
OSCIN
SYMBOL
SS1
DDD1
DDD2
SS2
Chinese Character System Teletext
(CCST) decoder
PIN
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
ground
ground
supply
supply
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
O
O
O
O
O
O
O
O
O
O
O
I
I
I
bit 4 of address to DRAM, ROM and IC
0 V power supply digital; connected internally to V
not connected
+5 V power supply digital; connected internally to V
bit 5 of address to DRAM, ROM and IC
bit 6 of address to DRAM, ROM and IC
bit 7 of address to DRAM, ROM and IC
not connected
bit 8 of address to DRAM, ROM and IC
bit 9 of address to DRAM, ROM and IC
row address strobe to DRAM; active LOW
not connected
write enable to DRAM and IC; active LOW
internally connected; do not use
bit 0 of data bus to/from DRAM, ROM and IC
bit 1 of data bus to/from DRAM, ROM and IC
+5 V power supply digital; connected internally to V
0 V power supply digital; connected internally to V
not connected
bit 2 of data bus to/from DRAM, ROM and IC
bit 3 of data bus to/from DRAM, ROM and IC
column address strobe to DRAM; active LOW
bit 10 of address to DRAM, ROM and IC
bit 7 of data bus to/from DRAM, ROM and IC
bit 6 of data bus to/from DRAM, ROM and IC
bit 5 of data bus to/from DRAM, ROM and IC
bit 4 of data bus to/from DRAM, ROM and IC
chip/processor reset input (active HIGH)
bidirectional serial data to/from optional Decryptor
primary I
primary I
serial clock to optional Decryptor
oscillator input from crystal/external clock input
2
2
C-bus serial clock input
C-bus serial data
5
DESCRIPTION
SS2
SS1
DD2
DD1
and V
and V
Preliminary specification
SS3
SS3
SAA5700