54ls114 National Semiconductor Corporation, 54ls114 Datasheet - Page 3

• Manufacturer Part Number: 54ls114
• Description: Dual Jk Negative Edge-triggered Flip-flop With Common Clocks And Clears
• Manufacturer: National Semiconductor Corporation

I
I
I
Symbol
Electrical Characteristics
Over recommended operating free air temperature range (unless otherwise noted)
Note 1 All typicals are at V
Note 2 Not more than one output should be shorted at a time and the duration should not exceed one second
Switching Characteristics
V
Truth Table
Asynchronous Inputs
H
L
t
t
IL
OS
CC
n
n
CC
a
e
LOW input to SD sets Q to HIGH level
LOW input to CD sets Q to LOW level
Clear and Set are independent of clock
Simultaneous LOW on CD and SD
makes both Q and Q HIGH
e
e
1
LOW Voltage Level
HIGH Voltage Level
Bit time before clock pulse
e
e a
f
t
t
t
t
Symbol
max
PLH
PHL
PLH
PHL
Bit time after clock pulse
5 0V T
Low Level Input Current
Short Circuit
Output Current
Supply Current
A
Parameter
e a
CC
e
25 C (See Section 1 for Test Waveforms and Output Load)
5V T
Maximum Count Frequency
Propagation Delay
CP to Q or Q
Propagation Delay
CD or SDn to Q or Q
A
e
25 C
Parameter
V
SD1 SD2 Inputs
CD Input
CP Input
V
(Note 2)
V
(Continued)
CC
CC
CC
e
e
e
Max V
Max
Max V
H
H
J
L
L
Inputs
Conditions
I
CP
t
n
e
K
H
H
L
L
e
0 4V Jn Kn Inputs
3
0V
Output
Qn
Qn
t
Q
H
n
L
a
1
Min
30
R
L
e
2k C
b
Min
20
L
e
15 pF
Max
(Note 1)
16
24
16
24
Typ
b
b
b
b
b
Max
8 0
1 44
100
0 4
0 8
1 6
Units
MHz
ns
ns
Units
mA
mA
mA
mA
mA
mA