mc54hc4538a Freescale Semiconductor, Inc, mc54hc4538a Datasheet - Page 8
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mc54hc4538a
Manufacturer Part Number
mc54hc4538a
Description
Dual Precision Monostable Multivibrator Retriggerable, Resettable
Manufacturer
Freescale Semiconductor, Inc
Datasheet
1.MC54HC4538A.pdf
(13 pages)
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
mc54hc4538aJ
Manufacturer:
MOTOROLA
Quantity:
28
MOTOROLA
INPUTS
A1, A2 (Pins 4, 12)
either of these pins triggers the corresponding multivibrator
when there is a high level on the B1 or B2 input.
B1, B2 (Pins 5, 11)
either of these pins triggers the corresponding multivibrator
when there is a low level on the A1 or A2 input.
Reset 1, Reset 2 (Pins 3, 13)
one of these pins, the Q output of the corresponding multi-
vibrator is reset to a low level and the Q output is set to a high
level.
C X 1/R X 1 and C X 2/R X 2 (Pins 2 and 14)
common points of the external timing resistors and capaci-
MC54/74HC4538A
A
B
Positive–edge trigger inputs. A rising–edge signal on
Negative–edge trigger inputs. A falling–edge signal on
Reset inputs (active low). When a low level is applied to
External timing components. These pins are tied to the
RESET
V CC
M2
V CC
M1
M3
2 k
POWER
RESET
ON
RxCx
V re , LOWER
REFERENCE
REFERENCE
V re , UPPER
CIRCUIT
CIRCUIT
LOWER
UPPER
TRIGGER CONTROL
CIRCUIT
–
+
–
+
PIN DESCRIPTIONS
(1/2 THE DEVICE)
C
CB
LOGIC DETAIL
R
Figure 9.
Q
3–8
tors (see the Block Diagram). Polystyrene capacitors are
recommended for optimum pulse width control. Electrolytic
capacitors are not recommended due to high leakages
associated with these type capacitors.
GND (Pins 1 and 15)
to ground through these pins.
OUTPUTS
Q1, Q2 (Pins 6, 10)
low) pulse high when the multivibrator is triggered at either
the A or the B input. The width of the pulse is determined by
the external timing components, R X and C X .
Q1, Q2 (Pins 7, 9)
pulse low when the multivibrator is triggered at either the A or
the B input. These outputs are the inverse of Q1 and Q2.
External ground. The external timing capacitors discharge
Noninverted monostable outputs. These pins (normally
Inverted monostable outputs. These pins (normally high)
OUTPUT
LATCH
RESET LATCH
TRIGGER CONTROL
RESET CIRCUIT
High–Speed CMOS Logic Data
DL129 — Rev 6
Q
Q