tsc693e ETC-unknow, tsc693e Datasheet - Page 63

• Manufacturer Part Number: tsc693e
• Description: Memory Controller
• Manufacturer: ETC-unknow

4. MEMORY CONTROLLER SIGNAL DESCRIPTIONS
4.1. Memory Controller Signal Summary
Table 6 lists the MEC signals. They are listed according to the signal name; the number
of pins allocated; the input (I), output(O) operating modes; a signal description; if it is
protected by parity (P); and the classification and grouping related to electrical
characteristics.
An asterisk *, after the signal name indicates that the signal is active low (true at a logic
0 level).
MATRA MHS
Rev. D (10 Apr. 97)
Signal
IU/FPU Interface Signals
A[31:0]
APAR
ASI[3:0]
SIZE[1:0]
ASPAR
D[31:0]
DPARIO
DMAAS
DRDY*
EXTHOLD*
EXTCCV
INULL
DXFER
LDSTO
LOCK
RD
WE*
WRT
IMPAR
AOE*
COE*
DOE*
BHOLD*
MDS*
MEXC*
Table 6 - MEC Signal Summary
#Pins
32
1
4
2
1
32
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
I/O/Z Description
I
I
I
I
I
I/O
I/O
I
O
I
I
I
I
I
I
I
I
I
I
O
O
O
O
O
O
Address Bus
Address Bus Parity
Address Space Identifier
Bus Transaction Size
ASI and SIZE Parity
Data Bus
Data Bus Parity Input/Output
DMA Address Strobe
Data Ready during DMA access
External Hold Input (FHOLD*)
External CCV Input (FCCV)
Integer Unit Nullify Cycle
Data Transfer
Atomic Load-Store
Bus Lock
Read Access
Write Enable
Advanced Write
IU to MEC Control Parity
Address Output Enable
Control Output Enable
Data Output Enable
Bus Hold
Memory Data Strobe
Memory Exception
TSC693E
Par Pin Type
P
P
P
P
P
P
P
P
P
P
P
P
P
P
TTL
TTL
TTL
TTL
TTL
TTL/CMOS
TTL/CMOS
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
CMOS
CMOS
CMOS
CMOS
CMOS
CMOS
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