hdmp-1636 Avago Technologies, hdmp-1636 Datasheet - Page 14

• Manufacturer Part Number: hdmp-1636
• Description: Gigabit Ethernet Transceiver Chip
• Manufacturer: Avago Technologies

V
CC
724
Start-up Procedure:
The transceiver start-up
procedure(s) use the following
conditions: V
and REFCLK = 125 MHz
ppm.
After the above conditions have
been met, apply valid data using a
balanced code such as 8B/10B.
Frequency lock occurs within
500 s. After frequency lock,
phase lock occurs within 2500 bit
times.
Figure 12. Power Supply Bypass.
GND_TXTTL
TXCAP1
C
PLLT
* SUPPLY VOLTAGE INTO V
BE FROM A LOW NOISE SOURCE. ALL BYPASS CAPACITORS
AND PLL FILTER CAPACITORS ARE 0.1 µF.
CC
V
V
CC
CC
GND_TXTTL
GND_TXA
= +3.3 V
_TXTTL
_TXTTL
V
CC
*
100
5%
TOP VIEW
CC
_RXA AND V
Transceiver Power
Supply Bypass and Loop
Filter Capacitors
Bypass capacitors should be
liberally used and placed as close
as possible to the appropriate
CC
V
V
CC
CC
_TXA SHOULD
V
CC
_RXTTL
_RXTTL
*
C
RXCAP0
PLLR
GND_RXTTL
GND_RXTTL
V
CC
power supply pins of the
HDMP-1636/46 as shown on the
schematic of Figure 12. All
bypass chip capacitors are
0.1 F. The V
V
power supply pins for the PLL
sections. The voltage into these
pins should be clean with
minimum noise. The PLL loop
filter capacitors and their pin
locations are also shown on
Figure 12. Notice that only two
capacitors are required: C
the transmitter and C
receiver. Nominal capacitance is
0.1 F. The voltage across the
capacitors is on the order of 1
volt, so the capacitor can be a
low voltage type and physically
small. The PLL capacitors are
placed physically close to the
appropriate pins on the HDMP-
1636/46. Keeping the lines short
will prevent them from picking
up stray noise from surrounding
lines or components.
CC
the Hewlett-Packard CSSD in San
Jose, California. Until Hewlett-
Packard releases this product for
general sales, HP reserves the right to
alter specifications, features,
capabilities, functions, manufacturing
release dates, and even general
availability of the product at any time.
This product is in development at
_TXA pins are the analog
PRE-RELEASE PRODUCT
DISCLAIMER:
CC
_RXA and
PLLR
PLLT
for the
for