cym1836v33 Cypress Semiconductor Corporation., cym1836v33 Datasheet

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cym1836v33

Manufacturer Part Number
cym1836v33
Description
128k 3.3v Static Module
Manufacturer
Cypress Semiconductor Corporation.
Datasheet
1.CYM1836V33.pdf (7 pages)
3
Features
Functional Description
The CYM1836V33 is a 3.3V high-performance 4-megabit stat-
ic RAM module organized as 128K words by 32 bits. This mod-
ule is constructed from four 128K x 8 SRAMs in SOJ packages
mounted on an epoxy laminate board with pins. Four chip se-
Cypress Semiconductor Corporation
• High-density 3.3V 4-megabit SRAM module
• 32-bit standard footprint supports densities from 16K
• High-speed CMOS SRAMs
• Access time of 25 ns
• 2.0V Data Retention (I
• SMD technology
• TTL-compatible inputs and outputs
• Available in 64-pin SIMM, 64-pin ZIP format or 72-pin
A
x 32 through 1M x 32
SIMM format.
— Low active power 1.6W (max.) at 20 ns
Logic Block Diagram
0
CS
CS
CS
CS
A
WE
OE
16
1
2
3
4
17
128K x 8
128K x 8
128K x 8
128K x 8
SRAM
SRAM
SRAM
SRAM
CCDRL
1836V33–1
4
4
4
4
= 0.8 mA, max.)
I/O
I/O
I/O
I/O
0
8
16
24
I/O
I/O
I/O
I/O
7
15
23
31
•
PD
PD
0
1
3901 North First Street
Pin Configurations
OPEN
OPEN
PRELIMINARY
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
CS
CS
GND
GND
128K x 32 3.3V Static RAM Module
I/O
I/O
I/O
I/O
V
I/O
I/O
I/O
I/O
PD
WE
64-pin ZIP/SIMM
A
A
A
A
A
A
CC
A
A
A
16
17
18
19
20
21
22
23
14
16
10
11
12
13
0
1
2
3
4
5
6
7
1
3
0
7
8
9
Top View
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
lects (CS
the four bytes. Reading or writing can be executed on individ-
ual bytes or any combination of multiple bytes through proper
use of selects.
Writing to each byte is accomplished when the appropriate
chip select (CS) and write enable (WE) inputs are both LOW.
Data on the input/output pins (I/O) is written into the mem-
ory location specified on the address pins (A
Reading the device is accomplished by taking the chip select
(CS) LOW while write enable (WE) remains HIGH. Under
these conditions, the contents of the memory location
specified on the address pins will appear on the data in-
put/output pins (I/O).
The data input/output pins stay at the high-impedance state
when write enable is LOW or the appropriate chip selects are
HIGH.
Two pins (PD
ory density in applications where alternate versions of the
JEDEC-standard modules can be interchanged.
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
1
3
5
7
9
1836V33–2
CS
CS
GND
GND
A
NC
OE
PD
I/O
I/O
I/O
I/O
A
A
A
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
A
A
A
V
A
I/O
I/O
I/O
I/O
15
CC
0
1
2
3
4
5
6
•
2
4
1
8
9
10
11
12
13
14
15
24
25
26
27
28
29
30
31
1
, CS
San Jose
0
2
and PD
, CS
3
PD
PD
PD
PD
, CS
0
1
2
3
1
) are used to identify module mem-
-
- OPEN
-
-
•
4
1836V33–3
) are used to independently enable
OPEN
OPEN
GND
CA 95134
GND
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
GND
CS
CS
PD
PD
I/O
I/O
I/O
I/O
V
I/O
I/O
I/O
I/O
WE
A
A
A
A
A
A
NC
NC
NC
CC
A
A
A
14
16
16
17
18
19
10
11
12
13
20
21
22
23
CYM1836V33
3
0
0
1
2
3
7
8
9
4
5
6
7
1
3
72-pin SIMM
Top View
•
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
fax id: 2046
0
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
408-943-2600
April 29, 1998
through A
1
3
5
7
9
NC
PD
GND
PD
I/O
I/O
I/O
I/O
A
A
A
I/O
I/O
I/O
I/O
GND
A
CS
CS
NC
OE
I/O
I/O
I/O
I/O
A
A
A
V
A
I/O
I/O
I/O
I/O
A
NC
CC
0
1
2
15
3
4
5
6
18
2
1
8
9
10
11
12
13
14
15
2
4
24
25
26
27
28
29
30
31
16
).

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cym1836v33 Summary of contents

Page 1

... Available in 64-pin SIMM, 64-pin ZIP format or 72-pin SIMM format. Functional Description The CYM1836V33 is a 3.3V high-performance 4-megabit stat- ic RAM module organized as 128K words by 32 bits. This mod- ule is constructed from four 128K x 8 SRAMs in SOJ packages mounted on an epoxy laminate board with pins. Four chip se- ...

Page 2

... Max., CS > Min. Duty Cycle = 100 Max., CS > V – 0.2V > V – 0. < 0. Test Conditions [ MHz 5. CYM1836V33 30 35 440 440 20 20 Ambient Temperature +70 C 3.3V 1836V33–20, 25, 1836V33–15 30, 35, 45 Min. Max. Min. Max. 2.4 2.4 0.4 0.4 2.2 V +0.3 2 ...

Page 3

... These parameters are guaranteed by design and not 100% tested. HZCS LZCS 3 CYM1836V33 ALL INPUT PULSES 90% 10% < 1836V33–5 Min. Max. Min. Max. Min. Max ...

Page 4

... OHA ACS t DOE t LZOE and OE CYM1836V33 Min. Max. Min. Max. Min ...

Page 5

... Data High Z PRELIMINARY SCS PWE t SD DATA VALID t HZWE SCS PWE t SD DATA VALID t HZWE Mode Deselect/Power-Down Read Write Deselect 5 CYM1836V33 LZWE HIGH IMPEDANCE 1836V33– HIGH IMPEDANCE 1836V33–9 ...

Page 6

... CYM1836V33PM–30C PM03 CYM1836V33PZ–30C PZ08 CYM1836V33P8–25C PM04 35 CYM1836V33PM–35C PM03 CYM1836V33PZ–35C PZ08 CYM1836V33P8–25C PM04 45 CYM1836V33PM–45C PM03 CYM1836V33PZ–45C PZ08 CYM1836V33P8–25C PM04 Shaded area contains advance information. Note: 12. 64-pin SIMM suitable for use in angled SIMM applications. ...

Page 7

... The inclusion of Cypress Semiconductor products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress Semiconductor against all charges. PRELIMINARY 64-Pin ZIP Module PZ08 72-Pin Plastic SIMM Module PM04 CYM1836V33 ...

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