hcts109t Intersil Corporation, hcts109t Datasheet - Page 3

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hcts109t

Manufacturer Part Number
hcts109t
Description
Radiation Hardened Dual Jk Flip Flop
Manufacturer
Intersil Corporation
Datasheet
Die Characteristics
DIE DIMENSIONS:
METALLIZATION:
SUBSTRATE POTENTIAL:
BACKSIDE FINISH:
Metallization Mask Layout
NOTE: The die diagram is a generic plot form a similar HCS device. It is intended to indicate approximate die size and bond pad location. The mask
Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time with-
out notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
2261 m x 2235 m x 533 m 51 m)
89 x 88 x 21mils 2mil
Type: Al Si
Thickness: 11kÅ 1kÅ
Unbiased Silicon on Sapphire
Sapphire
All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification.
series for the HCTS109 is TA14440A.
CP1 (4)
Q1 (6)
Q1 (7)
K1 (3)
S1 (5)
For information regarding Intersil Corporation and its products, see web site http://www.intersil.com
3
GND
(2)
(8)
J1
HCTS109T
HCTS109T
R1
(1)
Q2
(9)
PASSIVATION:
WORST CASE CURRENT DENSITY:
TRANSISTOR COUNT:
PROCESS:
Type: Silox (S
Thickness: 13k
< 2.0e5 A/cm
268
CMOS SOS
(10)
V
(16)
Q2
CC
2
i
O
Å
2
)
2.6k
Å
(15) R2
(14) J2
(13) K2
(12) CP2
(11) S2

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