hcts245ms Intersil Corporation, hcts245ms Datasheet
hcts245ms
Related parts for hcts245ms
hcts245ms Summary of contents
Page 1
... The HCTS245MS utilizes advanced CMOS/SOS technology to achieve high-speed operation. This device is a member of radiation hardened, high-speed, CMOS/SOS Logic Family. The HCTS245MS is supplied lead Ceramic flatpack (K suffi SBDIP Package (D suffix). Ordering Information PART NUMBER ...
Page 2
... OUTPUT ENABLE High Voltage Level Low Voltage Level Immaterial To prevent excess currents in the High-Z (Isolation) modes, all I/O terminals should be terminated with 10k to 1M resistors. HCTS245MS ONE OF 8 TRANSCEIVERS TRUTH TABLE CONTROL INPUTS DIR OPERATION L B Data to A Bus ...
Page 3
... VCC = 4.5V, VIH = 2.25V, Functional Test VIL = 0.8V (Note 2) NOTES: 1. All voltages reference to device GND. 2. For functional tests VO 4.0V is recognized as a logic “1”, and VO Specifications HCTS245MS Reliability Information Thermal Resistance SBDIP Package 10mA Ceramic Flatpack Package . . . . . . . . . . . 25mA Maximum Package Power Dissipation at +125 SBDIP Package ...
Page 4
... The parameters listed in Table 3 are controlled via design or process parameters. Min and Max Limits are guaranteed but not directly tested. These parameters are characterized upon initial design release and upon design changes which affect these characteristics. Specifications HCTS245MS GROUP (NOTES 1, 2) ...
Page 5
... AC measurements assume RL = 500 , CL = 50pF, Input 3ns, VIL = GND, VIH = 3V. 3. For functional tests VO 4.0V is recognized as a logic “1”, and VO TABLE 5. BURN-IN AND OPERATING LIFE TEST, DELTA PARAMETERS (+25 PARAMETER ICC IOL/IOH IOZL/IOZH Specifications HCTS245MS (NOTES 1, 2) CONDITIONS TEMPERATURE 0.5V is recognized as a logic “0”. GROUP B SUBGROUP DELTA LIMIT ...
Page 6
... Each pin except VCC and GND will have a resistor of 10k 2. Each pin except VCC and GND will have a resistor of 680 OPEN - NOTE: Each pin except VCC and GND will have a resistor of 47K Subgroup 2, sample size is 4 dice/wafer 0 failures. Specifications HCTS245MS TABLE 6. APPLICABLE SUBGROUPS METHOD GROUP A SUBGROUPS 100%/5004 ...
Page 7
... VCC 4.50 VIH 3.00 VS 1.30 VIL 0 GND 0 HCTS245MS 100% Interim Electrical Test 1 (T1) 100% Delta Calculation (T0-T1) 100% Static Burn-In 2, Condition hrs. min., o +125 C min., Method 1015 100% Interim Electrical Test 2 (T2) 100% Delta Calculation (T0-T2) 100% PDA 1, Method 5004 (Notes 1and 2) 100% Dynamic Burn-In, Condition D, 240 hrs., +125 ...
Page 8
... Three-State High Timing Diagrams VIH INPUT VS VIL TPZH VOH VT OUTPUT VOZ THREE-STATE HIGH VOLTAGE LEVELS PARAMETER HCTS VCC 4.50 VIH 3.00 VS 1.30 VT 1.30 VW 3.60 GND 0 HCTS245MS Three-State Low Load Circuit TPLZ VW UNITS Three-State High Load Circuit DUT TPHZ VW UNITS 621 VCC RL ...
Page 9
... A2 (4) A3 (5) A4 (6) A5 (7) NOTE: The die diagram is a generic plot from a similar HCS device intended to indicate approximate die size and bond pad location. The mask series for the HCTS245 is TA14417A. HCTS245MS HCTS245MS 622 (18) B0 (17) B1 (16) B2 (15) B3 (14) B4 (13) B5 ...
Page 10
... For information regarding Intersil Corporation and its products, see web site http://www.intersil.com Sales Office Headquarters NORTH AMERICA Intersil Corporation P. O. Box 883, Mail Stop 53-204 Melbourne, FL 32902 TEL: (407) 724-7000 FAX: (407) 724-7240 HCTS245MS EUROPE Intersil SA Mercure Center 100, Rue de la Fusee 1130 Brussels, Belgium TEL: (32) 2.724.2111 FAX: (32) 2.724.22.05 ...