hcts240ams Intersil Corporation, hcts240ams Datasheet

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hcts240ams

Manufacturer Part Number
hcts240ams
Description
Radiation Hardened Octal Buffer/line Driver, Three-state
Manufacturer
Intersil Corporation
Datasheet
September 1995
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Copyright © Intersil Corporation 1999
Features
• 3 Micron Radiation Hardened CMOS SOS
• Total Dose 200K RAD (Si)
• SEP Effective LET No Upsets: >100 MEV-cm
• Single Event Upset (SEU) Immunity < 2 x 10
• Dose Rate Survivability: >1 x 10
• Dose Rate Upset >10
• Latch-Up Free Under Any Conditions
• Military Temperature Range: -55
• Significant Power Reduction Compared to LSTTL ICs
• DC Operating Voltage Range: 4.5V to 5.5V
• LSTTL Input Compatibility
• Input Current Levels Ii
Description
The Intersil HCTS240AMS is a Radiation Hardened inverting
octal buffer/line driver, three-state, with two active low output
enables (1OE, 2OE). 1OE controls outputs 1Yn, 2OE
controls outputs 2Yn.
The
technology to achieve high-speed operation. This device is a
member of radiation hardened, high-speed, CMOS/SOS
Logic Family .
The HCTS240AMS is supplied in a 20 lead Ceramic flatpack
(K suffix) or a SBDIP Package (D suffix).
Ordering Information
HCTS240ADMSR
HCTS240AKMSR
HCTS240AD/Sample
HCTS240AK/Sample
HCTS240AHMSR
Bit-Day (Typ)
- VIL = 0.8V Max
- VIH = VCC/2 Min
HCTS240AMS
PART NUMBER
10
utilizes
RAD (Si)/s 20ns Pulse
5 A at VOL, VOH
TEMPERATURE RANGE
advanced
12
o
C to +125
RAD (Si)/s
-55
-55
o
o
C to +125
C to +125
+25
+25
+25
o
o
o
o
C
C
C
CMOS/SOS
C
2
/mg
-9
o
o
C
C
Errors/
HCTS240AMS
1
Pinouts
Intersil Class S Equivalent
Intersil Class S Equivalent
Sample
Sample
Die
Octal Buffer/Line Driver, Three-State
1 OE
GND
1 A0
2 Y3
1 A1
2 Y2
1 A2
2 Y1
1 A3
2 Y0
SCREENING LEVEL
MIL-STD-1835 CDFP4-F20, LEAD FINISH C
MIL-STD-1835 CDIP2-T20, LEAD FINISH C
FLATPACK PACKAGE (FLATPACK)
20 LEAD CERAMIC DUAL-IN-LINE
20 LEAD CERAMIC METAL SEAL
METAL SEAL PACKAGE (SBDIP)
1 OE
GND
1 A0
1 A1
1 A2
1 A3
2 Y3
2 Y2
2 Y1
2 Y0
10
1
2
3
4
5
6
7
8
9
1
2
3
4
5
6
7
8
9
10
TOP VIEW
TOP VIEW
Radiation Hardened
20 Lead SBDIP
20 Lead Ceramic Flatpack
20 Lead SBDIP
20 Lead Ceramic Flatpack
Die
20
19
18
17
16
15
14
13
12
11
20
19
18
17
16
15
14
13
12
11
Spec Number
VCC
2 OE
1 Y0
2 A3
1 Y1
2 A2
1 Y2
2 A1
1 Y3
2 A0
File Number
PACKAGE
VCC
2 OE
1 Y0
2 A3
1 Y1
2 A2
1 Y2
2 A1
1 Y3
2 A0
518889
2105.2

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hcts240ams Summary of contents

Page 1

... The HCTS240AMS utilizes advanced technology to achieve high-speed operation. This device is a member of radiation hardened, high-speed, CMOS/SOS Logic Family . The HCTS240AMS is supplied lead Ceramic flatpack (K suffi SBDIP Package (D suffix). Ordering Information PART NUMBER TEMPERATURE RANGE HCTS240ADMSR HCTS240AKMSR HCTS240AD/Sample ...

Page 2

... Functional Diagram 1Y0 1OE 1A0 H = High Voltage Level L = Low Voltage Level X = Immaterial Z = High Impedance HCTS240AMS 1Y1 1Y2 1Y3 2Y0 2Y1 1A1 1A2 1A3 2A0 2A1 TRUTH TABLE INPUTS OUTPUT ...

Page 3

... All voltages referenced to device GND. 2. Force/measure functions may be interchanged. 3. For functional tests, VO 4.0V is recognized as a logic “1”, and Due to tester noise at -55 C VIH is increased 200mV. Specifications HCTS240AMS Reliability Information Thermal Resistance SBDIP Package 10mA Ceramic Flatpack Package . . . . . . . . . . . 35mA Maximum Package Power Dissipation at +125 SBDIP Package ...

Page 4

... These parameters are characterized upon initial design release and upon design changes which affect these characteristics. TABLE 4. DC POST RADIATION ELECTRICAL PERFORMANCE CHARACTERISTICS PARAMETER SYMBOL Supply Current ICC Output Current (Sink) IOL Output Current IOH (Source) Specifications HCTS240AMS GROUP (NOTES SUB- CONDITIONS GROUPS ...

Page 5

... IOZ IOL/IOH CONFORMANCE GROUPS Initial Test (Preburn-In) Interim Test I (Postburn-In) Interim Test II (Postburn-In) PDA Interim Test III (Postburn-In) PDA Final Test Group A (Note 1) Specifications HCTS240AMS (NOTE 1) CONDITIONS 0.5V is recognized as a logic “0”. o TABLE 5. DELTA PARAMETERS (+25 GROUP B SUBGROUP DELTA LIMIT -15 Hour TABLE 6 ...

Page 6

... Each pin except VCC and GND will have a resistor of 680 OPEN 12, 14, 16, 18 NOTE: Each pin except VCC and GND will have a resistor of 47K E, Subgroup 2, sample size is 4 dice/wafer 0 failures. Specifications HCTS240AMS TABLE 6. APPLICABLE SUBGROUPS METHOD GROUP A SUBGROUPS Sample/5005 ...

Page 7

... Variables Data (All Delta operations). Data is identified by serial number. Data header includes lot number and date of test. • The Certificate of Conformance is a part of the shipping invoice and is not part of the Data Book. The Certificate of Conformance is signed by an authorized Quality Representative. HCTS240AMS 100% Interim Electrical Test 1 (T1) 100% Delta Calculation (T0-T1) 100% Static Burn-In 2, Condition hrs ...

Page 8

... VIH INPUT VS VSS TPZL VOZ VT OUTPUT VOL THREE-STATE LOW VOLTAGE LEVELS PARAMETER HCTS VCC 4.50 VIH 3.00 VS 1.30 VT 1.30 VW 0.90 GND 0 HCTS240AMS Propagation Delay Load Circuit TPHL UNITS Three-State Low Load Circuit TPLZ 50pF RL = 500 UNITS DUT TEST POINT ...

Page 9

... For information regarding Intersil Corporation and its products, see web site http://www.intersil.com Sales Office Headquarters NORTH AMERICA Intersil Corporation P. O. Box 883, Mail Stop 53-204 Melbourne, FL 32902 TEL: (321) 724-7000 FAX: (321) 724-7240 HCTS240AMS Three-State High Load Circuit TPHZ VW UNITS ...

Page 10

... (7) NOTE: The die diagram is a generic plot from a similar HCS device intended to indicate approximate die size and bond pad location. The mask series for the HCTS240A is TA14400B. HCTS240AMS HCTS240AMS 10 (18 (17 (16 (15 (14 ...

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