hcts4002ms Intersil Corporation, hcts4002ms Datasheet

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hcts4002ms

Manufacturer Part Number
hcts4002ms
Description
Radiation Hardened Dual 4-input Nor Gate
Manufacturer
Intersil Corporation
Datasheet
August 1995
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
http://www.intersil.com or 407-727-9207
Features
• 3 Micron Radiation Hardened CMOS SOS
• Total Dose 200K RAD (Si)
• SEP Effective LET No Upsets: >100 MEV-cm
• Single Event Upset (SEU) Immunity < 2 x 10
• Dose Rate Survivability: >1 x 10
• Dose Rate Upset >10
• Latch-Up Free Under Any Conditions
• Military Temperature Range: -55
• Significant Power Reduction Compared to LSTTL ICs
• DC Operating Voltage Range: 4.5V to 5.5V
• LSTTL Input Compatibility
• Input Current Levels Ii
Description
The Intersil HCTS4002MS is a Radiation Hardened Dual 4-Input
NOR Gate. A high on any input forces the output to a low state.
The HCTS4002MS utilizes advanced CMOS/SOS technology to
achieve high-speed operation. This device is a member of
radiation hardened, high-speed, CMOS/SOS Logic Family.
The HCTS4002MS is supplied in a 14 lead Ceramic flatpack (K
suffix) or a SBDIP Package (D suffix).
Ordering Information
HCTS4002DMSR
HCTS4002KMSR
HCTS4002D/
Sample
HCTS4002K/
Sample
HCTS4002HMSR
(Typ)
- VIL = 0.8V Max
- VIH = VCC/2 Min
NUMBER
PART
TEMPERATURE
-55
-55
o
o
RANGE
C to +125
C to +125
+25
+25
+25
10
RAD (Si)/s 20ns Pulse
o
o
o
C
C
C
5 A at VOL, VOH
|
Copyright
o
o
C
C
12
Intersil Class
S Equivalent
Intersil Class
S Equivalent
Sample
Sample
Die
o
SCREENING
C to +125
©
RAD (Si)/s
LEVEL
Intersil Corporation 1999
o
-9
C
2
/mg
Errors/Bit-Day
14 Lead SBDIP
14 Lead
Ceramic
Flatpack
14 Lead SBDIP
14 Lead
Ceramic
Flatpack
Die
PACKAGE
HCTS4002MS
718
Pinouts
Functional Diagram
NOTE: L = Logic Level Low, H = Logic level High,
14 LEAD CERAMIC METAL SEAL FLATPACK PACKAGE
GND
NC
A1
B1
C1
D1
Y1
An
H
L
X
X
X
An
Bn
Cn
Dn
14 LEAD CERAMIC DUAL-IN-LINE METAL SEAL
PACKAGE (SBDIP) MIL-STD-1835 CDIP2-T14
X = Don’t Care
(FLATPACK) MIL-STD-1835 CDFP3-F14
Bn
H
X
X
X
L
GND
INPUTS
NC
Y1
A1
B1
C1
D1
1
2
3
4
5
6
7
Dual 4-Input NOR Gate
TRUTH TABLE
1
2
3
4
5
6
7
Cn
X
X
H
X
L
TOP VIEW
TOP VIEW
Radiation Hardened
Dn
X
X
X
H
L
Spec Number
14
13
12
11
10
9
8
File Number
14
13
12
11
10
9
8
VCC
Y2
D2
C2
B2
A2
NC
OUTPUTS
Yn
H
L
L
L
L
518632
3075.1
Yn
VCC
Y2
D2
C2
B2
A2
NC

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hcts4002ms Summary of contents

Page 1

... NOR Gate. A high on any input forces the output to a low state. The HCTS4002MS utilizes advanced CMOS/SOS technology to achieve high-speed operation. This device is a member of radiation hardened, high-speed, CMOS/SOS Logic Family. The HCTS4002MS is supplied lead Ceramic flatpack (K suffi SBDIP Package (D suffix). Ordering Information PART ...

Page 2

... VCC = 4.5V, VIH = 2.25V, Functional Test VIL = 0.8V (Note 2) NOTES: 1. All voltages reference to device GND. 2. For functional tests VO 4.0V is recognized as a logic “1”, and VO Specifications HCTS4002MS Reliability Information Thermal Resistance SBDIP Package 10mA Ceramic Flatpack Package . . . . . . . . . . . 25mA Maximum Package Power Dissipation at +125 SBDIP Package ...

Page 3

... TPHL, VCC = 4.5V TPLH NOTES: 1. All voltages referenced to device GND measurements assume RL = 500 , CL = 50pF, Input 3ns, VIL = GND, VIH = 3V. 3. For functional tests VO 4.0V is recognized as a logic “1”, and VO Specifications HCTS4002MS GROUP (NOTES SUB- CONDITIONS GROUPS TEMPERATURE 9 ...

Page 4

... Group D NOTE: 1. Alternate Group A Inspection in accordance with Method 5005 of MIL-STD-883 may be exercised. CONFORMANCE GROUPS METHOD Group E Subgroup 2 5005 NOTE: 1. Except FN test which will be performed 100% Go/No-Go. Specifications HCTS4002MS GROUP B SUBGROUP DELTA LIMIT 5 5 -15 Hour TABLE 6. APPLICABLE SUBGROUPS METHOD GROUP A SUBGROUPS ...

Page 5

... Each pin except VCC and GND will have a resistor of 10k 2. Each pin except VCC and GND will have a resistor of 1K OPEN NOTE: Each pin except VCC and GND will have a resistor of 47K Group E, Subgroup 2, sample size is 4 dice/wafer 0 failures. Specifications HCTS4002MS 1/2 VCC = 3V 0.5V VCC = ...

Page 6

... Variables Data (All Delta operations). Data is identified by serial number. Data header includes lot number and date of test. • The Certificate of Conformance is a part of the shipping invoice and is not part of the Data Book. The Certificate of Conformance is signed by an authorized Quality Representative. HCTS4002MS 100% Interim Electrical Test 1 (T1) 100% Delta Calculation (T0-T1) 100% Static Burn-In 2, Condition hrs ...

Page 7

... AC Timing Diagrams VIH INPUT VS VIL TPLH VOH VS OUTPUT VOL TTLH VOH 80% 20% OUTPUT VOL AC VOLTAGE LEVELS PARAMETER HCTS VCC 4.50 VIH 3.00 VS 1.30 VIL 0 GND 0 HCTS4002MS AC Load Circuit TPHL TTHL 80% 20% UNITS 724 DUT TEST POINT 50pF RL = 500 Spec Number 518632 ...

Page 8

... A1 (2) B1 (3) C1 (4) D1 (5) NOTE: The die diagram is a generic plot from a similar HCS device intended to indicate approximate die size and bond pad location. The mask series for the HCTS4002 is TA14429A. HCTS4002MS HCTS4002MS 725 (12) D2 (11) C2 (10) B2 (9) A2 518632 Spec Number ...

Page 9

... For information regarding Intersil Corporation and its products, see web site http://www.intersil.com Sales Office Headquarters NORTH AMERICA Intersil Corporation P. O. Box 883, Mail Stop 53-204 Melbourne, FL 32902 TEL: (407) 724-7000 FAX: (407) 724-7240 HCTS4002MS EUROPE Intersil SA Mercure Center 100, Rue de la Fusee 1130 Brussels, Belgium TEL: (32) 2.724.2111 FAX: (32) 2.724.22.05 ...

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