php21n06t NXP Semiconductors, php21n06t Datasheet

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php21n06t

Manufacturer Part Number
php21n06t
Description
Trenchmoso Transistor Standard Level Fet
Manufacturer
NXP Semiconductors
Datasheet

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Philips Semiconductors
GENERAL DESCRIPTION
N-channel
standard level field-effect power
transistor in a plastic envelope using
’trench’ technology. The device
features very low on-state resistance
and has integral zener diodes giving
ESD protection up to 2kV. It is
intended
converters and general purpose
switching applications.
PINNING - TO220AB
LIMITING VALUES
Limiting values in accordance with the Absolute Maximum System (IEC 134)
ESD LIMITING VALUE
THERMAL RESISTANCES
December 1997
TrenchMOS
Standard level FET
SYMBOL
V
V
I
I
I
P
T
SYMBOL
V
SYMBOL
R
R
D
D
DM
PIN
V
stg
DS
DGR
tot
C
tab
th j-mb
th j-a
1
2
3
GS
, T
j
gate
drain
source
drain
for
enhancement
DESCRIPTION
PARAMETER
Drain-source voltage
Drain-gate voltage
Gate-source voltage
Drain current (DC)
Drain current (DC)
Drain current (pulse peak value)
Total power dissipation
Storage & operating temperature
PARAMETER
Electrostatic discharge capacitor
voltage, all pins
PARAMETER
Thermal resistance junction to
mounting base
Thermal resistance junction to
ambient
use
transistor
in
DC-DC
mode
QUICK REFERENCE DATA
PIN CONFIGURATION
SYMBOL
V
I
P
T
R
D
j
DS
tot
DS(ON)
CONDITIONS
-
R
-
T
T
T
T
-
CONDITIONS
Human body model
(100 pF, 1.5 k )
CONDITIONS
-
in free air
mb
mb
mb
mb
GS
tab
PARAMETER
Drain-source voltage
Drain current (DC)
Total power dissipation
Junction temperature
Drain-source on-state
resistance
= 25 ˚C
= 100 ˚C
= 25 ˚C
= 25 ˚C
= 20 k
1 2 3
1
V
GS
= 10 V
SYMBOL
TYP.
MIN.
MIN.
- 55
60
-
-
-
-
-
-
-
-
-
g
MAX.
Product specification
175
55
21
69
75
MAX.
MAX.
MAX.
14.7
2.18
175
55
55
20
21
84
69
2
-
PHP21N06T
d
s
Rev 1.100
UNIT
UNIT
UNIT
K/W
K/W
UNIT
kV
W
˚C
m
V
V
V
A
A
A
W
˚C
V
A

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php21n06t Summary of contents

Page 1

... PIN CONFIGURATION tab CONDITIONS - ˚ 100 ˚ ˚ ˚ CONDITIONS Human body model (100 pF, 1 CONDITIONS - in free air 1 Product specification PHP21N06T MAX. UNIT 175 SYMBOL MIN. MAX. UNIT - 14 ...

Page 2

... Measured from drain lead 6 mm from package to centre of die Measured from source lead 6 mm from package to source bond pad CONDITIONS 19.7 A; -dI /dt = 100 - Product specification PHP21N06T MIN. TYP. MAX. UNIT 2.0 3.0 4 ...

Page 3

... Philips Semiconductors TrenchMOS transistor Standard level FET AVALANCHE LIMITING VALUE SYMBOL PARAMETER W Drain-source non-repetitive DSS unclamped inductive turn-off energy December 1997 CONDITIONS ˚ Product specification PHP21N06T MIN. TYP. MAX. UNIT - - 30 mJ Rev 1.100 ...

Page 4

... Fig.5. Typical output characteristics 120 tp = 110 1 us 100 10us 90 100 10ms 100ms 50 100 ˚C Fig.6. Typical on-state resistance Product specification PHP21N06T Zth/ (K/W) 0.5 0.2 0 0.05 0. 1.0E-06 0.0001 0.01 1 t/s Fig.4. Transient thermal impedance f(t); parameter j-mb p VGS ...

Page 5

... 100 150 200 0.01 Fig.12. Typical capacitances f Product specification PHP21N06T VGS(TO max. typ. min. - 100 150 Fig.10. Gate threshold voltage. = f(T ); conditions mA Sub-Threshold Conduction 2% typ 98 Fig ...

Page 6

... VDS = 44V Fig.15. Normalised avalanche energy rating VGS 0 1 1.5 Fig.16. Avalanche energy test circuit. j VGS 0 6 Product specification PHP21N06T WDSS 100 120 140 160 Tmb / f(T ); conditions DSS VDS - T.U. RGS shunt ...

Page 7

... Observe the general handling precautions for electrostatic-discharge sensitive devices (ESDs) to prevent damage to MOS gate oxide. 2. Refer to mounting instructions for SOT78 (TO220) envelopes. 3. Epoxy meets UL94 V0 at 1/8". December 1997 10,3 max 3,7 2,8 3,0 13,5 min 1 max (2x) 0,9 max (3x) 2,54 2,54 Fig.18. SOT78 (TO220AB); pin 2 connected to mounting base. 7 Product specification PHP21N06T 4,5 max 1,3 5,9 min 0,6 2,4 Rev 1.100 15,8 max ...

Page 8

... Philips customers using or selling these products for use in such applications their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale. December 1997 8 Product specification PHP21N06T Rev 1.100 ...

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