k6t1008c2c-tb70 Samsung Semiconductor, Inc., k6t1008c2c-tb70 Datasheet - Page 5

• Manufacturer Part Number: k6t1008c2c-tb70
• Description: 128k X8 Bit Low Power Cmos Static Ram
• Manufacturer: Samsung Semiconductor, Inc.

AC OPERATING CONDITIONS
TEST CONDITIONS
AC CHARACTERISTICS
DATA RETENTION CHARACTERISTICS
1. CS
K6T1008C2C Family
Vcc for data retention
Data retention current
Data retention set-up
Recovery time
Input pulse level : 0.8 to 2.4V
Input rising and falling time : 5ns
Input and output reference voltage : 1.5V
Output load (See right) :C
Read
Write
1
Vcc-0.2v, CS
Item
Read cycle time
Address access time
Chip select to output
Output enable to valid output
Chip select to low-Z output
Output enable to low-Z output
Chip disable to high-Z output
Output disable to high-Z output
Output hold from address change
Write cycle time
Chip select to end of write
Address set-up time
Address valid to end of write
Write pulse width
Write recovery time
Write to output high-Z
Data to write time overlap
Data hold from write time
End write to output low-Z
2
Vcc-0.2V or CS
(Test Load and Test Input/Output Reference)
Parameter List
V
I
t
t
L
Symbol
DR
SDR
RDR
=100pF+1TTL
DR
2
0.2V
CS
Vcc=3.0V, CS
CS2 Vcc-0.2V or CS
See data retention waveform
1
1)
Vcc-0.2V, CS
1
Vcc-0.2V,
Test Condition
2
2
Vcc-0.2V or CS
0.2V
5
t
t
Symbol
CO1,
WR1,
t
t
t
t
t
t
t
t
t
t
t
t
WHZ
t
t
t
OHZ
t
t
OLZ
WC
CW
AW
WP
DW
OW
RC
OE
OH
DH
AA
HZ
AS
K6T1008C2C-L
K6T1008C2C-B
K6T1008C2C-P
K6T1008C2C-F
LZ
t
t
WR2
CO2
2
0.2V
Min
1. Including scope and jig capacitance
55
10
10
55
45
45
40
25
5
0
0
0
0
0
0
5
-
-
-
C
L
55ns
1)
Min
2.0
Max
0
5
-
-
-
-
55
55
25
20
20
20
Speed Bins
-
-
-
-
-
-
-
-
-
-
-
-
-
Typ
Min
CMOS SRAM
70
10
10
70
60
60
50
30
1
1
-
-
-
-
-
5
0
0
0
0
0
0
5
-
-
-
70ns
Max
Max
November 1997
5.5
20
10
25
10
70
70
35
25
25
25
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
Revision 2.0
Units
Unit
ms
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
V
A