tmpr4951u-133 TOSHIBA Semiconductor CORPORATION, tmpr4951u-133 Datasheet

tmpr4951u-133

Manufacturer Part Number

tmpr4951u-133

Description

Tx System Risctm Product Selection Guide

Manufacturer

TOSHIBA Semiconductor CORPORATION

Datasheet

1.TMPR4951U-133.pdf (2 pages)

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TX19 Core Features

The TX19 is an exceptionally compact, high-performance processor at

20Mips and is available as an ASIC-ready core as well as a standard

product. Based on MIPS

TX19 offers the performance of a 32-bit RISC processor while deliver-

ing the compact code size associated with a 16-bit instruction set.

Using an optimized interrupt circuitry, the TX19 is ideal for embedded

applications requiring real-time interrupt response.

• 5-Stage Pipeline

• MIPS 32-/16-Based

• Non-Blocking Load

• Data Cache: 1Kbyte, 2-Way S/A, Write-Thru

• Instruction Cache: 4Kbyte, 2-Way S/A

• 4-Cycle MAC

• Direct Segment Mapping MMU

• DRAM, ROM, DMA and Interrupt Controller

TX System RISC Product Selection Guide

Notes

1) Chip Scale Packaging under development

2) Includes Prefetch

3) Contact www.Galileot.com

* Under development

TOSHIBA

TMPR1904AF

TMPR3904AF

TMPR3907F

TMPR3912AU

TMPR3922U

*TMPR4951U-133 133

Processor

Clock

(MHz)

75/92

CPU

148

ALU

Bus

Ext.

I ISA and supporting the MIPS 16 ASE,

III

ISA I Cache D Cache

(2)

TOSHIBA AMERICA ELECTRONIC COMPONENTS, INC.

Cycles DSU DMAC

MAC

–

2 Ch

4 Ch

–

Controller

Memory

SDRAM

DRAM

ROM,

–

MMU

TX39 Core Features

TX39 offers many enhancements over the TX19 family, such as various

low power modes, one-cycle MAC, register score-boarding and high-

performance cache.

• 5-Stage Pipeline

• MIPS I ISA as well as some MIPS II & III Instructions

• Non-Blocking Load

• Data Cache: 4Kbyte, 2-Way S/A, Write Back/Write-Thru (3912/22)

• Instruction Cache: 8Kbyte, 2-Way S/A (3912/22)

• 1-Cycle MAC

• 64-Entry MMU/TLB, 4K to 4M (3912/22)

TX49 Core Features

TX49 is a true 64-bit processor for high-end embedded applications.

The efﬁcient pipe line design and the register score-boarding of this

family allows for reaching very high performances.

• Optimized 5-Stage Pipeline

• MIPS ISA III Plus PREF Instruction

• Non-Blocking Load

• Data Cache: 16Kbyte, 4-Way S/A, Write Back/Write-Thru

• Instruction Cache: 16Kbyte, 4-Way S/A

• 4-Cycle MAC

• 48-Entry MMU/TLB

–

Cont.

PCI

–

TX System RISC Product

Selection Guide

2 UART

1 UART

2 UART

SIO

Timer

3 Ch,

IRC

1Kx1K 39

LCD

–

I/O

–

FQFP Pins Windows CE

Package

208

160

208

240

120

(1)

–

Companion

TC35143F

TC6358

Note

Chips

–

(3)

Related parts for tmpr4951u-133

tmpr4951u-133 Summary of contents

Page 1

... TMPR3912AU 75/ TMPR3922U 148 (2) *TMPR4951U-133 133 64 32 III 16 Notes 1) Chip Scale Packaging under development 2) Includes Prefetch 3) Contact www.Galileot.com * Under development TOSHIBA AMERICA ELECTRONIC COMPONENTS, INC. TX39 Core Features TX39 offers many enhancements over the TX19 family, such as various low power modes, one-cycle MAC, register score-boarding and high- performance cache ...

Page 2

TX System RISC Tools Support Tools C/C++ Compiler Assembler Linker Simulator (3) RTOS DSU ICE Evaluation Board Full ICE Windows CE Notes 1) Under development 2) R4000 based 3) CMX, ISI, WRS under development Companion Chips Toshiba has developed a ...

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