ta1370fg TOSHIBA Semiconductor CORPORATION, ta1370fg Datasheet - Page 13

• Manufacturer Part Number: ta1370fg
• Description: Sync Processor, Frequency Counter Ic For Tv Component Signals
• Manufacturer: TOSHIBA Semiconductor CORPORATION

Bus Control Map
Bus Control Functions
Write Mode
Read Mode
Write Mode
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Sub-Add
Slave Address: D8/DA/DC
00
01
02
03
Slave Address: D9/DB/DD
0
1
H-FREQUENCY (Horizontal oscillation frequency)
HD1/VD1-OUT SW (HD1/VD1 output switch)
HD2/VD2-OUT SW (HD2/VD2 output switch)
SEPA LEVEL (Sync separation level switch)
DAC1 (DAC1 control)
DAC2 (DAC2 control)
DAC3 (DAC3 control)
Switches horizontal frequency.
Note: To prevent a horizontal mislock, set (10) 33.75 kHz mode just before (01) 31.5 kHz mode setting when
Switches output from pin 16/28. When set to 00, 01, or 10, outputs HD/VD without synchronization.
When set to 11, outputs HD/VD from the sync circuit. (Note) Synchronized VD width will change, when
HD PHASE will be changed.
Switches output from pin 19/29. When set to 00, 01, or 10, outputs HD/VD without synchronization.
When set to 11, outputs HD/VD from the sync circuit. (Note) Synchronized VD width will change, when
HD PHASE will be changed.
Switches sync separation level of pin 24/26. Set values are the levels from sync tip. Sync separation level
is changed according to the ratio of H-SYNC width during 1H period. (Note) This IC doesn’t have the
sync-separation circuit for non-standard signals like weak strength signal, ghost signal and so on.
Controls 2-bit DAC (pin 12).
Controls 2-bit DAC (pin 25).
Controls open collector 1-bit DAC (pin 30).
(00): 28.125 kHz
Horizontal frequency become 31.25 kHz when H-FREQUENCY = (01) and V-FREQUENCY = (001)
*(00): HD1/VD1
*(00): HD1/VD1
*(00): 10IRE
(00): 1 V
*(00): 1 V
*(0): OPEN (HIGH)
HD-IN
MSB
MSB
POR
H-FREQUENCY
the horizontal frequency mode is switched to (01) 31.5 kHz mode.(wait time: 1 ms or more)
Additionally, in 31.5 kHz mode, set (10) 33.75 kHz mode at first and set (01) 31.5 kHz mode again,
when 525 p/625 p signal is pulled-in again from no-input.
D7
D7
(*: Preset)
DAC1
V-FREQUENCY
D6
D6
(01): 31.5 kHz (31.25 kHz)
(01): HD2/VD2
(01): HD2/VD2
(01): 15IRE
(01): 3 V
(01): 3 V
H
H
HD1/VD1-OUT SW
D5
D5
HD PHASE
(1): ON (LOW)
DAC2
CLP-PHS
D4
D4
V FREQUENCY DET
H FREQUENCY DET
(10): HD3/VD3
(10): HD3/VD3
(10): 20IRE
*(10): 5 V
(10): 5 V
13
HD2/VD2-OUT SW
DAC3
D3
FREQ DET SW
D3
*(10): 33.75 kHz
TEST
D2
D2
(11): Synchronized HD/VD
(11): Synchronized HD/VD
(11): 25IRE (at 1125I/60)
(11): 7 V
(11): 7 V
HD1-INV
VD1-INV
D1
D1
SEPA LEVEL
INPUT SW
(11): 45 kHz
HD2-INV
VD2-INV
LSB
LSB
D0
D0
TA1370FG
2005-09-05
MSB
1000
1000
1000
1000
Preset
0000
0000
0000
0000
LSB