h55s1g62mfp-60 Hynix Semiconductor, h55s1g62mfp-60 Datasheet - Page 36

• Manufacturer Part Number: h55s1g62mfp-60
• Description: 64mx16bit Mobile Sdram
• Manufacturer: Hynix Semiconductor

WRITE to READ
Command
The preceding burst write operation can be aborted and a new burst read operation can be started by inputting a new
read command in the write cycle. The data of the read command (READ) is output after the lapse of the /CAS latency.
The preceding write operation (WRIT) writes only the data input before the read command.
The data bus must go into a high-impedance state at least one cycle before output of the latest data.
Notes:
1. Same bank, same ROW address: When the read command is executed at the same ROW address of the same bank
2. Same bank, different ROW address: When the ROW address changes, consecutive read commands cannot be
3. Different bank: When the bank changes, the read command can be performed after an interval of no less than 1
Rev 1.2 / Jul. 2008
Address
CLK
DQ
DQ
as the preceding write command, the read command can be performed after an interval of no less than 1 clock.
However, in the case of a burst write, data will continue to be written until one clock before the read command is
executed.
executed; it is necessary to separate the two commands with a precharge command and a bank active command.
clock, provided that the other bank is in the bank active state. However, in the case of a burst write, data will
continue to be written until one clock before the read command is executed (as in the case of the same bank and
the same address).
WRITE
BA, Col
D
D
I
I
b
b0
b0
D
D
I
I
b1
b1
BA, Col
READ
n
D
O
n0
D
D
1Gbit (64Mx16bit) Mobile SDR Memory
O
O
n1
n0
D
D
O
O
n1
n2
D
D
O
O
n3
n2
H55S1G62MFP Series
D
O
n3
CL = 2
CL = 3
Don't Care
BL = 4
BL = 4
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