adc-44d ETC-unknow, adc-44d Datasheet
adc-44d
Related parts for adc-44d
adc-44d Summary of contents
Page 1
... ADC-44d Multi-Function Analogue Input/Output Card User Manual ...
Page 2
...
Page 3
... Information offered in this manual is correct at the time of printing. Blue Chip Technology accepts no responsibility for any inaccuracies. This information is subject to change without notice. All trademarks and registered names acknowledged. Blue Chip Technology Ltd. Chowley Oak, Tattenhall Chester, Cheshire Telephone : 01829 5772000 Facsimile : 01829 772001. 0127-0170 ADC-44d\..\0127-0170.Doc 1.1 ADC-44d Rev. B CH3 9EX. ...
Page 4
Amendment History Issue Issue Author Level Date 1.0 21/1/96 EGW 1.1 22/1/97 EGW Amendment Details First approved issue, new front sheet. Addition of EMC information to Technical Section. Filename was ...\Userg.doc Change address. Windowed front sheet. Layout drg was A4. ...
Page 5
... Input Scaling ................................................................................ 15 Analogue Voltage Outputs............................................................ 16 Analogue Current Outputs............................................................ 17 Selecting the Load Resistor/Supply Voltage ................................. 17 Typical Connections..................................................................... 19 OPERATION OF THE CARD ........................................................... 20 Programmable Digital Input Output .............................................. 20 Control Code Table ...................................................................... 21 Timer ........................................................................................... 22 Timer Modes................................................................................ 23 ADC Section ................................................................................ 24 ADC Operating Modes ................................................................. 24 DAC Section ................................................................................ 27 Blue Chip Technology Ltd. Contents 01270170.doc ...
Page 6
... MAPS AND REGISTERS................................................................. 29 Card Address Map ....................................................................... 29 DAC Control Register................................................................... 30 ADC Control Register................................................................... 31 ADC Gain Select Table ................................................................ 31 ADC Start Convert Mode Table.................................................... 31 Status Register ............................................................................ 32 Mask 0 Control Register............................................................... 32 SAMPLE PROGRAM DESCRIPTIONS............................................ 33 QBASIC Examples....................................................................... 33 'C' Examples ................................................................................ 34 DETAILED CARD INSTALLATION................................................... 35 Base Address............................................................................... 35 Interrupts...................................................................................... 37 DMA Settings............................................................................... 38 Analogue Input Range ...
Page 7
APPENDIX A - NUMBERING SYSTEMS ......................................... 43 Binary and Hexadecimal Numbers ............................................... 43 Base Address Selection ............................................................... 46 APPENDIX MAPS................................................................. 47 PC/XT/AT I/O Address Map ......................................................... 47 PC/XT Interrupt Map .................................................................... 48 PC/AT Interrupt Map .................................................................... 49 ...
Page 8
...
Page 9
... Chapter 1 Outline Description OUTLINE DESCRIPTION The ADC-44d is a PC-compatible short card which provides digital inputs and outputs, timers, analogue inputs and analogue outputs. There are 24 TTL compatible programmable digital input/outputs available externally. There are also three programmable timers. Two of the timer outputs are available externally to the user and may be gated by external circuitry ...
Page 10
... Analogue Inputs Analogue Input Channels Full Scale Input Ranges Input Common Mode Range Programmable Gains Pre-Set Link Gain ADC Conversion Time Maximum Data Throughput Resolution Accuracy @ 25ºC, Gain x1, Single Ended Input:- Unipolar Range Bipolar 5 V Range Data Transfer Modes ...
Page 11
Chapter 2 Analogue Outputs Analogue Outputs Resolution Voltage Outputs Current Outputs Output Error: Volts Current Output Settling Time Data Transfer DMA Channels Supported Fastest DMA Transfer Rate Channel Selection DMA Transfer Initialisation Maximum Time Skew Channel 1 to Channel 4 ...
Page 12
Page 4 Digital Input/Output Number of Channels Digital Inputs High Level Input Current Low Level Input Current Digital Outputs Logic High Voltage Current Logic Low Voltage Current Power Supply Requirements Specification 24 2.2 Volts minimum 10µA sink 0.8 Volts maximum ...
Page 13
Chapter 2 Timers Number Of Timer Channels Timer Usage Timer 0 Timer 1 Timer 2 Timer 0 Resolution Minimum Time Maximum Time Timer 1 Resolution Minimum Time Maximum Time Timer 2 Resolution Minimum Time Maximum Time Board Connectors PC ISA ...
Page 14
Page 6 Electromagnetic Compatibility (EMC) This product meets the requirements of the European EMC Directive (89/336/EEC) and is eligible to bear the CE mark. It has been assessed operating in a Blue Chip Technology Icon industrial PC. However, because the ...
Page 15
Chapter 2 Ensure that the screen of the external cable is bonded to a good RF earth at the remote end of the cable. Failure to observe these recommendations may invalidate the EMC compliance. Warning This is a Class A ...
Page 16
... The interrupt settings are selected by links on jumper block JP6. Only one link should be fitted for each of the ADC and the DAC not possible to select the same interrupt for both. If interrupt operation is not required leave off the link for the appropriate function. ...
Page 17
... The appendix contains a section explaining the use of DMA Analogue Input Range The input range for the ADC is 50 mV, 100 mV, 500 mV 2 bipolar ( V) or unipolar (0 to +V) for full scale reading on the ADC. The selection of bipolar or unipolar is controlled by the setting of a link on JP2. ...
Page 18
... Page 10 Be aware also that the software is unaware of the setting of JP5. Therefore when JP5 is fitted the values returned by the ADC will reflect a value of 50% of the actual voltage applied to the inputs. The user must multiply the final value obtain the correct reading if JP5 is fitted. ...
Page 19
... Chapter 4 USING THE CARD External Input/Output Connections The ADC-44d has two connectors for external circuitry. The analogue input and output signals are available at a standard 50 pin D-type connector which protrudes through the end bracket of the printed circuit board. The digital input output signals including those of the timers, are presented way IDC header at the inner end of the printed circuit board ...
Page 20
Page 12 Analogue Connections The following table shows the pin out of the D-type analogue connector CON2. The pins are arranged in three rows. Signal Pin Single Differl Pin 1 +Vin0 -Vin0 18 2 +Vin1 -Vin1 19 3 +Vin2 -Vin2 ...
Page 21
... Digital 0 Volt Return Key: DIO- “x” “n” Digital input/output, Port “x”, Bit “n” of I/O device. ADC Trigger Control input for Timer 2 (ADC timer) DAC Trigger Control input for Timer 1 (DAC timer) See the section “Typical Connections” for examples. ...
Page 22
... Page 14 Analogue Inputs The ADC-44d analogue input circuitry can be software configured to operate with single ended or differential signals. A single ended input measures the absolute voltage applied to the input channel (e.g. Vin3) with reference to the signal ground connection or 0 Volts (Vin 0v). This is the simplest connection type and suitable in all but the noisiest environments ...
Page 23
... Chapter 4 Input Scaling The ADC-44d gain can be selected by software and by the use of a link. The link selects x1 or x½ ranges. The programmable gains may be set to x1, x2, x10, x100. In combination these provide the capability to measure the following full scale input voltages:- 10 Volts, 5 Volts, 2.5 Volts, 500 mV, 100 mV and 50 mV ...
Page 24
... Page 16 Analogue Voltage Outputs The analogue output signals from the ADC-44d are available as voltages and current sinks simultaneously. Each of the four output signals (Vout0 to Vout3) has a corresponding analogue ground or 0 Volt connection. The voltage outputs are referenced to these connections. Measuring output voltages with reference to other ground points (particularly the digital ground) will give electrically noisy results ...
Page 25
Chapter 4 Analogue Current Outputs Four current outputs are available corresponding to the four voltage outputs. The outputs sink current from an external power supply provided by the user. Additional pins are provided at the output connector to facilitate the ...
Page 26
Page guide the graph below can be used to determine load resistor values and supply voltages ...
Page 27
Chapter 4 Typical Connections The following two diagrams illustrate the method of connection. The first shows the use of the internal connections to wire the external loads directly to the output connector. Note that pin single common ...
Page 28
... Page 20 Operation of the Card OPERATION OF THE CARD Programmable Digital Input Output The ADC44d includes an NEC µPD71055 device which is equivalent to an Intel i8255 PIO. This device provides 24 programmable digital I/O channels suitable for sensing the presence of, or driving TTL connections only. The digital I/O appears to the PC as four ports. The first three can be set as input or output by writing suitable codes to the fourth Control Port ...
Page 29
Chapter 5 Operation of the Card Control Code Table The µPD71055 can operate in one of three modes. The first mode (Mode 0) provides simple I/O for three, 8 bit ports. Data is written to or read from a specified ...
Page 30
... On the ADC-44d, Timer 0 is used as a prescaler and may only be used free running in mode Timers 1 and 2 are connected to the output of the prescaler. This allows the DAC and the ADC to have 17.5 minute interval between updates ...
Page 31
... Chapter 5 Operation of the Card The timer circuit appears to the PC as four ports. These four ports are mapped into the ADC44d port map as follows: ADDRESS Base + 12 Timer/Counter 0 Base + 13 Timer/Counter 1 Base + 14 Timer/Counter 2 Base + 15 Control port Timer Modes The timers have five modes of operation. Only Modes 3 and 4 are described for the prescaler. Refer to the data sheet of the µ ...
Page 32
... I/O read/write operations; by automatic re-trigger, or; by timer control. The modes are set by writing to the upper 2 bits of the ADC CONTROL register at address Base + 4 (see MAP and REGISTER section for details). Note - When changing modes it is necessary to issue an ADC reset instruction (Read Base + 4) 10µS after the mode change. This allows the ADC device time to finish an internal cycle (if any) before clearing the busy bit ...
Page 33
... Chapter 5 Operation of the Card In its simplest mode an ADC cycle is triggered by writing to Base + 5 with bits 6 and 7 of the ADC CONTROL register set to zero (default condition). A typical sequence of events to acquire data in this mode would be: Select the mode by writing the value 0 to bits Base + 4. ...
Page 34
Page 26 Operation of the Card If DMA is enabled a DMA transfer will be requested on each timer ‘tick’. An interrupt is always generated at this point indicating that data is available. If DMA is not enabled the data ...
Page 35
Chapter 5 Operation of the Card DAC Section The Digital to Analogue Converter is accessed as 4 ports. These ports are mapped into the PC at the following addresses. ADDRESS Base + 0 Write DAC Output Data, low 8 bits ...
Page 36
... Set the channel number in bits 0 and 1 of Base + 1. Start the timer by setting bit 3 high in Base + 1. Note: As with the ADC, the GATE input for Timer 1 is available on pin 28 of the 50 way IDC connector. If pin 28 is pulled LOW by an external signal the timer is inhibited. This may be used as a simple hardware trigger ...
Page 37
... Output Data to ADC Control Register. Reset ADC Control Logic Only. Start ADC in DMA or PC Mode Control Register - ADC Mux & DAC Mask Input Status of ADC & DAC Busy Bits & Channel Addresses Digital Input/Output Channels Digital Input/Output Channels Digital Input/Output Channels Digital Input/Output Control Register Timer 0 Count Register ...
Page 38
Page 30 Maps and Registers DAC Control Register (Base + 1) DATA BIT 0 Binary DAC Channel Select Default = Channel DAC 10v reference off, all DAC outputs = 0v. (Default) 1 ...
Page 39
... See Gain Select Table Below Single 16 Channel I/P (Default Differential 8 Channel I Disable ADC Timer 2 (Default Enable ADC Timer ADC in I/O Mode (Default DMA MODE Manual Channel Select (Default Auto Channel Increment 6 ADC Mode Bits 0 and 1 7 See Table Below For Modes ...
Page 40
... DAC Output is updated (Default DAC Output is not updated 4 5 Manual ADC Channel Selection Bits ( binary) 6 Default = Channel 0 7 NOTE: Although any or all channels can be disabled, if the channel scanning is enabled, all channels are presented with data from the DMA array as if they were active ...
Page 41
... The disk supplied with the card contains several example programs to demonstrate the various operating modes. QBASIC Examples EXAMPLE1.BAS Demonstrates the simplest I/O mode to read all 16 ADC input channels. EXAMPLE2.BAS Demonstrates the AUTO START CONVERT mode and sets the channel scanner to read all 16 input channels. ...
Page 42
... Page 34 Sample Program Descriptions 'C' Examples EXAMPLE6.C Demonstrates reading the ADC on a single channel using DMA and the on board timer. EXAMPLE7.C Demonstrates writing to a single DAC channel using DMA and the on board timer. EXAMPLE8.C Demonstrates writing to multiple DAC channels using DMA the on board timer ...
Page 43
Chapter 8 DETAILED CARD INSTALLATION Before installing the card into your computer system, there are a number of links which must be set. The settings of these links will depend upon the computer system into which the card is being ...
Page 44
Page 36 Set the following pattern on the links whilst viewing the card with Connector CON2 on right hand side and the gold fingers to the lower edge.:- Other examples are: Card Installation Chapter 8 ...
Page 45
... The DAC generates an interrupt signal after the output has been updated. The interrupts are selected on jumper block JP6. A link is added to the block in the ADC row if ADC interrupts are required, and similarly a link is added to the DAC row if DAC interrupt are required. If interrupts are not required, the links are not fitted. ...
Page 46
... DMA Settings The DMA selection is set on two sets of jumper blocks, JP7 and JP8. JP7 controls which channel the ADC and DAC use to request Direct Memory Access. Only channels 1 and 3 are available. Jumper JP8 sets the channel on which the DMA controller acknowledges the request essential that the pattern of links on the two jumper blocks correspond ...
Page 47
... Notice that a full scale input of 5 Volts can be obtained with two different settings also important to note that the software cannot be aware of the setting of JP5. When JP5 is fitted the values returned by the ADC will reflect a value of only 50% of the actual voltage applied to the inputs. The user must multiply the final answer obtain the correct reading if JP5 is fitted ...
Page 48
Page 40 Fitting the Card Once all the links have been set, the card can be installed into the host computer. First and foremost ensure that the power is turned off at the supply. Carefully follow all of the manufacturer's ...
Page 49
Chapter 8 CARD LAYOUT Blue Chip Technology Ltd. Card Installation Page 41 127-170 ...
Page 50
Page 42 127-170 Card Installation Blue Chip Technology Ltd. Chapter 8 ...
Page 51
Appendix A Numbering Systems APPENDIX A - NUMBERING SYSTEMS Binary and Hexadecimal Numbers The normal numbering system is termed DECIMAL because there are ten possible digits ( any single column of numbers. Decimal numbers are also referred ...
Page 52
Page 44 Numbering Systems The following table shows how the three systems indicate successive numbers Decimal Binary Base 10 Base ...
Page 53
Appendix A Numbering Systems The following diagram illustrates this. BIT No 7 DECIMAL VALUE 128 64 To determine the decimal value of a binary pattern, add up the decimal number of each column containing a binary “1”. BIT No 7 ...
Page 54
Page 46 Numbering Systems Base Address Selection Each column can be physically represented on the board by a pair of pins. In practice, the boards cover a range of addresses (usually 16 low order four bits are not included, but ...
Page 55
Appendix B APPENDIX MAPS PC/XT/AT I/O Address Map Address Allocated to: 000-01F DMA Controller 1 (8237A-5) 020-03F Interrupt Controller 1 (8259A) 040-05F Timer (8254) 060-06F Keyboard Controller (8742) Control Port B 070-07F RTC and CMOS RAM, NMI ...
Page 56
Page 48 PC/XT Interrupt Map Number Allocated to: NMI Parity 0 Timer 1 Keyboard 2 Reserved 3 Asynchronous Communications (Secondary) SDLC Communications 4 Asynchronous Communications (Primary) SDLC Communications 5 Fixed Disk 6 Diskette 7 Parallel Printer 127-170 PC Maps Blue ...
Page 57
Appendix B PC/AT Interrupt Map Level Allocated to: CPU NMI Parity or I/O Channel Check CTLR 1 CTLR 2 (Interrupt Controllers) IRQ 0 Timer Output 0 IRQ 1 Keyboard (Output Buffer Full) IRQ 2 Interrupt from CTLR 2 IRQ 8 ...
Page 58
Page 50 APPENDIX C - HOW TO USE DMA Direct Memory Access or DMA is a process by which data can be transferred directly from the memory of the PC into an I/O card or directly from the I/O card ...
Page 59
Appendix C These port locations are fixed for all PCs as follows:- I/O READ/ ADDRESS WRITE 0000H R/W 0001H R/W 0002H R/W 0003H R/W 0004H R/W 0005H R/W 0006H R/W 0007H R/W 0008H R/W 0009H R/W 000AH R/W 000BH R/W ...
Page 60
Page 52 The DMA Controller Registers In order to begin a DMA transfer there are several registers within the DMA controller which need to be configured. The relevant registers are described below:- Mode Register Port 0BH MODE ...
Page 61
Appendix C Auto Initialise 0 Disabled 1 Enabled If set to AUTO INITIALISE, when the DMA transfer reaches the end of a block, the DMA controller will reload all its initial values and repeat the transfer. This is useful on ...
Page 62
Page 54 Mask Register Port 0AH NOT NOT NOT NOT USED USED USED USED CLR/SET Mask 0 Clear Mask Bit 1 Set Mask Bit Mask Bit 1 Bit 0 FUNCTION 0 0 Channel 0 select 0 ...
Page 63
Appendix C Clear Byte Pointer Flip Flop Port 0CH Any write to this port resets the byte pointer flip flop. This ensures that the first write to the Start Address or Transfer Length registers will go into the LSB of ...
Page 64
Page 56 Addressing In order for DMA to operate correctly the page register and start address register should be set-up to inform the DMA controller where in memory the transfer is to take place. The INTEL x86 family of microprocessors ...
Page 65
Appendix C DMA Limitations The DMA controller is only capable of incrementing or decrementing the DMAOFFSET address, the DMAPAGE value is fixed throughout the transfer. This means that a maximum of 64K bytes can be transferred in one operation. Programming ...
Page 66
Page 58 2000 REM PROGRAM THE DMA CONTROLLER 2005 REM FIRST EXTRACT THE SEGMENT AND OFFSET ADDRESS OF OUR DATA 2010 seg = VARSEG(DAT%(0)) 2020 offs = VARPTR(DAT%(0)) 2025 REM Transfer the Logical SEGMENT:OFFSET address 2027 REM into a physical ...