A43E16161V-75F AMICC [AMIC Technology], A43E16161V-75F Datasheet - Page 2

• Manufacturer Part Number: A43E16161V-75F
• Description: 1M X 16 Bit X 2 Banks Low Power Synchronous DRAM
• Manufacturer: AMICC [AMIC Technology]

Preliminary
Features
General Description
The
synchronous high data rate Dynamic RAM organized as 2
X 1,048,576 words by 16 bits, fabricated with AMIC’s high
performance CMOS technology. Synchronous design
allows precise cycle control with the use of system clock.
Pin Configuration
PRELIMINARY
54 TSOP (II)
Low power supply
- VDD: 1.8V
Two banks / Pulse RAS
MRS cycle with address key programs
- CAS Latency (2 & 3)
- Burst Length (1,2,4,8 & full page)
- Burst Type (Sequential & Interleave)
All inputs are sampled at the positive going edge of the
system clock
Deep Power Down Mode
DQM for masking
Auto & self refresh
Clock Frequency (max) : 105MHz @ CL=3 (-95)
LVCMOS compatible with multiplexed address
A43E16161
54 53 52 51 50 49 48 47 46 45
1
VDDQ : 1.8V
(August, 2005, Version 0.0)
2
is
3
33,554,432
4 5
133MHz @ CL=3 (-75)
1M X 16 Bit X 2 Banks Low Power Synchronous DRAM
6
7
bits
8
9 10
Low
44
11
Power
A43E16161V
43
12
42 41 40 39 38 37 36 35 34 33 32 31 30
13 14 15 16 17 18 19 20 21 22 23 24 25 26 27
1
I/O transactions are possible on every clock cycle. Range
of operating frequencies, programmable latencies allows
the same device to be useful for a variety of high
bandwidth,
applications.
Self refresh with programmable refresh period through
EMRS cycle
Programmable Power Reduction Feature by partial
array activation during Self-refresh through EMRS
cycle
Auto TCSR
Industrial operating temperature range: -40ºC to +85ºC
for -U series.
Available in 54-pin TSOP(II) package
Package is available to lead free (-F series)
64ms refresh period (4K cycle)
high
performance
AMIC Technology, Corp.
A43E16161
29
memory
28
system