A43E26161G-95F AMICC [AMIC Technology], A43E26161G-95F Datasheet - Page 36

no-image

A43E26161G-95F

Manufacturer Part Number
A43E26161G-95F
Description
1M X 16 BIT X 4 BANKS LOW POWER SYNCHRONOUS DRAM
Manufacturer
AMICC [AMIC Technology]
Datasheet
Mode Register Set Cycle
(December, 2004, Version 1.0)
CLOCK
ADDR
RAS
CAS
CKE
DQM
CS
DQ
WE
* All banks precharge should be completed before Mode Register Set cycle and auto refresh cycle.
* Note : 1.
0
*Note 2
2. Minimum 2 clock cycles is required before new
3. Please refer to Mode Register Set table.
1
MODE REGISTER SET CYCLE
CS , RAS , CAS &
mode register.
MRS
Key
* Note 1
* Note 3
2
Hi-Z
High
3
Command
New
Ra
4
5
WE
activation at the same clock cycle with address key will set internal
6
Auto Refresh Cycle
RAS activation.
0
35
1
Auto Refresh
2
High
Hi-Z
3
4
5
AMIC Technology, Corp.
t
RC
6
7
8
A43E26161
New Command
9
: Don't care
10

Related parts for A43E26161G-95F