A43L3616V-6 AMICC [AMIC Technology], A43L3616V-6 Datasheet - Page 28

• Manufacturer Part Number: A43L3616V-6
• Description: 2M X 16 Bit X 4 Banks Synchronous DRAM
• Manufacturer: AMICC [AMIC Technology]

(February, 2002, Version 3.0)
Page Write Cycle at Different Bank @Burst Length=4
CLOCK
A10/AP
ADDR
* Note:
1. To interrupt burst write by Row precharge, DQM should be asserted to mask invalid input data.
2. To interrupt burst write by Row precharge, both the write and precharge banks must be the same.
DQM
RAS
CAS
CKE
BS1
BS0
DQ
CS
WE
0
Row Active
(A-Bank)
RAa
RAa
1
2
Row Active
(B-Bank)
RBb
RBb
3
(A-Bank)
Write
DAa0 DAa1 DAa2
CAa
4
5
6
DAa3
7
t
CDL
(B-Bank)
Write
CBb
DBb0
8
Row Active
(C-Bank)
DBb1
RCc
RCc
9
28
High
DBb2 DBb3 DCc0 DCc1
10
Row Active
(D-Bank)
RDd
RDd
11
(C-Bank)
Write
CCc
12
13
(D-Bank)
DDd0 DDd1
Write
CDd
14
AMIC Technology, Inc.
15
CDd2
*Note 1
16
t
RDL
17
(All Banks)
Precharge
A43L3616
: Don't care
18
*Note 2
19