FM25L256-S RAMTRON [Ramtron International Corporation], FM25L256-S Datasheet
![no-image](/images/no-image-200.jpg)
FM25L256-S
Available stocks
Related parts for FM25L256-S
FM25L256-S Summary of contents
Page 1
... Packaging Options Pin Configuration caused by VSS /CS SO /WP VSS Pin Name /CS /WP /HOLD SCK SI SO VDD VSS drop-in Ordering Information FM25L256-S FM25L256-G FM25L256-DG 1850 Ramtron Drive, Colorado Springs, CO 80921 VDD 1 8 HOLD 2 7 SCK VDD /HOLD ...
Page 2
... SO may be connected to SI for a single pin data interface. VDD Supply Power Supply (3.0V to 3.6V) VSS Supply Ground Rev. 2.3 March 2007 Clock Generator Control Logic Write Protect 8192 x 32 FRAM Array 15 Address Register Counter Data I/O Register Nonvolatile Status Figure 1. Block Diagram specifications. DD FM25L256 Extended Temp Register Page ...
Page 3
... This is explained in more detail in the interface section. Users expect several obvious system benefits from the FM25L256 due to its fast write cycle and high endurance as compared to EEPROM. In addition there are less obvious benefits as well. For example in a high noise environment, the fast-write operation is less susceptible to corruption than an EEPROM since it is completed quickly ...
Page 4
... Rev. 2.3 March 2007 SO SI SCK SO FM25L256 FM25L256 CS HOLD CS P1.0 P1 FM25 L256 C S HOLD P1 Figure 4. SPI Modes 0 & 3 FM25L256 Extended Temp. SI SCK HOLD MOSI : Master Out Slave In MISO : Master In Slave Out SS : Slave Select SCK Page ...
Page 5
... Power Up to First Access The FM25L256 is not accessible for a period of time (10 ms) after power up. Users must comply with the timing parameter t , which is the minimum time PU from V (min) to the first /CS low. DD Data Transfer All data transfers to and from the FM25L256 occur in 8-bit groups. They are synchronized to the clock signal (SCK), and they transfer most significant bit (MSB) first ...
Page 6
... Status register. Reading Status provides information about the current state of the write protection features. Following the RDSR op- code, the FM25L256 will return one byte with the contents of the Status register. The Status register is described in detail in a later section. ...
Page 7
... The SPI interface, which is capable of a relatively high clock frequency, highlights the fast write capability of the FRAM technology. Unlike SPI-bus EEPROMs, the FM25L256 can perform sequential writes at bus speed. No page register is needed and any number of sequential writes may be performed. Write Operation All writes to the memory array begin with a WREN op-code ...
Page 8
... MSB LSB Figure 9. Memory Write 16-bit Address MSB LSB Figure 10. Memory Read FM25L256 Extended Temp Data MSB LSB Data Out ...
Page 9
... Std JESD22-A115-A) = 3.0V to 3.6V unless otherwise specified) DD Min Typ 3 0 -0.3 V – other inputs -0.3V FM25L256 Extended Temp. Ratings -1.0V to +5.0V -1.0V to +5.0V and V < V +1. - 125 C 300 C 3kV 1kV 100V MSL-1 Max Units Notes 3 0 1.0 A 2.5 A 5 ...
Page 10
... DD L Min 3.0V to 3.6V) DD min) DD waveform. power ramp profiles. The behavior of the internal circuits is difficult to predict DD = 3.3V) DD Min - - DD DD FM25L256 Extended Temp. Max Units Notes 20 MHz 1 1 ...
Page 11
... Power Cycle Timing Data Retention (V = 3.0V to 3.6V) DD Parameter Data Retention Rev. 2.3 March 2007 tCL tF tR tOH tODV tHH tHS tHZ V min Min Max Units 10 - Years FM25L256 Extended Temp. tD tCSH tCH tOD tHS tHH tLZ t VF Notes Page ...
Page 12
... XXXX= part number, P= package (S, G, DG), T= temp (C=comm., blank=ind.) LLLLLLL= lot code XXXXXX-PT RIC=Ramtron Int’l Corp, YY=year, WW=work week LLLLLLL RICYYWW Example: FM25L256, Standard SOIC package, Extended temperature, Year 2005, Work Week 39 FM25L256-S A40003S RIC0539 Rev. 2.3 March 2007 Recommended PCB Footprint 3.90 0.10 6 ...
Page 13
... Legend: R=Ramtron, G=”green” TDFN package, XXXX=base part number RGXXXX LLLL= lot code, T= temperature (C=commercial, blank=extended) LLLL_T YY=year, WW=work week YYWW Example: “Green” TDFN package, FM25L256, Extended temperature, Lot 0003, Year 2005, Work Week 39 RG5L25 0003 0539 Rev. 2.3 March 2007 Exposed metal pad ...
Page 14
... Split into commercial and extended temp datasheets. Changed min. temp to -25C and V min to 3.0V. Added recommended pcb footprint to DFN DD package drawing. Added power up note to Power Cycle Timing table. Package name change, from DFN to TDFN. Not recommended for new designs. Use FM25L256B as an alternative. FM25L256 Extended Temp. spec limit. Changed ...