P10C68- ZARLINK [Zarlink Semiconductor Inc], P10C68- Datasheet - Page 12

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P10C68-

Manufacturer Part Number
P10C68-
Description
CMOS/SNOS NVSRAM HIGH PERFORMANCE 8 K x 8 NON-VOLATILE STATIC RAM
Manufacturer
ZARLINK [Zarlink Semiconductor Inc]
Datasheet
P10C68/P11C68
NON-VOLATILE MEMORY OPERATION OF P11C68
NOTES
21.
22.
STORE / RECALL CYCLES 1 AND 2 (See notes 24 and 29)
NOTES
23.
24.
25.
26.
27.
28.
29.
30.
12
Standard
t
t
t
t
t
t
AVQZ
EHAX
AVAV
AXAV
AVEL
ELEH
E
H
L
L
L
L
MODE SELECTION
The six consecutive addresses must be in order listed - (0000, 1555, 0AAA, 1FFF, 10F0, 0F0F) for a STORE cycle or
(0000, 1555, 0AAA, 1FFF, 10F0, 0F0E) for a RECALL cycle. W (bar) must be high during all six consecutive cycles. See
STORE CYCLE and RECALL CYCLE tables and diagrams for further details.
I/O state assumes that G (bar) ≥V
Skew spec may be avoided by using E (bar) (STORE/RECALL CYCLE 2).
W (bar) ≥V
Required address sequences are shown in the Mode Selection table.
Once the software STORE or RECALL cycle is initiated, it completes automatically, ignoring all inputs.
Measured with W (bar) high, G (bar) low and E (bar) low. Note that STORE cycles (but not RECALLS) are aborted by Vcc
< 3.3V (STORE Inhibit).
E (bar) must make the transition between V
Chip is continuously selected with E (bar) low.
Addresses 1 through 6 are found in the Mode Selection table. Address 6 determines whether the P11C68 performs a
STORE or RECALL. A RECALL cycle is performed automatically at power up when V
below 3.3V once it has exceeded it for the RECALL to function properly, t
exceeds 3.3V.
Address transitions may not occur on any address pin during this time.
Symbol
W
X
H
H
H
Alternative
L
t
t
RECALL
t
STORE
t
IH
SKEW
t
ELQZ
ACS
t
t
t
AE
EP
EA
during entire address sequence to initiate a non-volatile cycle.
A
12
-A
0AAA
0AAA
1FFF
1FFF
0F0E
0000
1555
10F0
0F0F
0000
1555
10F0
X
X
X
0
Read cycle time
Skew between sequentially
adjacent addresses
Address valid to output inactive
Store cycle time
Recall cycle time
Address set-up to chip enable
Chip enable pulse width
Chip disable to address change
(hex)
IL
Not selected
Read RAM
Write RAM
Read RAM
Read RAM
Read RAM
Read RAM
Read RAM
Non-volatile STORE
Read RAM
Read RAM
Read RAM
Read RAM
Read RAM
Non-volatile RECALL
. Activation of non-volatile cycles does not depend on the state of G (bar).
Parameter
IH
Mode
(max) to V
IL
(max), or V
Min.
35
35
P11C68-35
0
0
Output High Z
Output High Z
Output High Z
Output Data
Output Data
Output Data
Output Data
Output Data
Output Data
Output Data
Output Data
Output Data
Output Data
Output data
Input Data
IL
Max.
I/O
(max) to V
75
10
20
5
RECALL
Min.
is measured from the point at which V
45
45
P11C68-45
0
0
IH
(min) in a monotonic fashion.
CC
exceeds 3.3V. V
Max.
Standby
Power
75
10
20
Active
Active
Active
Active
5
I
CC2
Units
ms
µs
ns
ns
ns
ns
ns
ns
CC
must not drop
Notes
21, 22
21, 22
21, 22
21, 22
21, 22
21, 22
21, 22
21, 22
21, 22
21, 22
22
20
21
Notes
26, 30
23
25
26
27
27
27
CC

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