SL2101C ZARLINK [Zarlink Semiconductor Inc], SL2101C Datasheet
SL2101C
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SL2101C Summary of contents
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... Synthesized Broadband Converter with SL2101C/KG/NP1P SSOP SL2101C/KG/NP1Q SSOP SL2101C/KG/NP2P SSOP* SL2101C/KG/NP2Q SSOP* SL2101C/KG/LH2N MLP* SL2101C/KG/LH2Q MLP* All codes baked and drypacked Description The SL2101 is a fully integrated single chip broadband mixer oscillator with low phase noise PLL frequency synthesizer ...
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SL2101 1 28 XTAL CAP PUMP 2 27 DRIVE XTAL 26 SDA 3 PORT P0 25 SCL 4 Vee 5 24 BUFREF ADD 23 Vccd 6 Vee 22 Vee 7 VccLO 21 Vee 8 LOB ...
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Quick Reference Data All data applies at maximum power setting with the following conditions unless otherwise stated; a) nominal loads as follows; 1220 MHz output load as in Figure 4 44 MHz output load as in Figure 5 b) input ...
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Converter Section In normal application the RF input is interfaced through appropriate impedance matching and an AGC front end to the device input. The RF input preamplifier of the device is designed for low noise figure, within the operating region ...
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Typical applications for the crystal oscillator are contained in Figure 24 and Figure 25. Figure 25 is used when driving ...
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Programmable Features Synthesizer programmable divider Reference programmable divider Charge pump current Power setting Test mode General purpose ports, P0 Buffered crystal reference output, BUFREFThe buffered crystal reference frequency can be switched to the 15 SL2101 14 Figure 4 - Nominal ...
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SL2101 Figure 5 - Nominal Output Load as Downconverter, 44 MHz IF SL2101 Figure 6 - Output Load as Downconverter to a Differential Amplifier ...
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CH1 DB1 4.7V PRm Cor Z 0 Avg 50 16 Smo START 1 000.000 000 MHz Figure 8 - Typical RF Input Impedance as Broadband Upconverter (Maximum Power Setting) RFIN 75 Ω Figure 9 - ...
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CH1 UA6 4.7V PRm Cor Z 0 Avg 75 16 Smo START 1 000.000 000 MHz Figure 10 - Typical RF Input Impedance as Narrow Band Downconverter (maximum power RFIN 200 Ω Figure 11 - ...
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Figure 12 - Two Tone Intermodulation Test Condition Spectrum, Input Referred 100 200 Figure 13 - Input NF, Typical (Maximum Power Setting) SL2101 ...
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Figure 14 - Conversion Gain as Upconverter (Maximum Power Setting ...
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Figure 17 - Oscillator Typical Phase Noise Performance at 10 kHz Offset 2 4 BB555 Figure 18 - Downconverter Oscillator Application 100 ...
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Figure 20 - Downconverter Gain, NF and IP3 with Recommended (Fig. 4) Load Versus Power CH1 DB1 ...
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SL2101 CH1 1_: 1.3588 k UA6 4.7V PRm Cor Z 0 Avg 50 16 Smo START 10.000 000 MHz Figure 22 - Typical IF Output Impedance as Downconverter, Single-Ended ...
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SL2101 ...
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Figure 25 - Application When Driving Two SL2101 from One Crystal ...
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MSB Address Programmable divider Programmable divider Control data Control data Table 1 - Write Data Format (MSB is transmitted first) MSB Address ...
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Electrical Characteristics - Test conditions (unless otherwise stated). T characteristics are guaranteed by either production test or design. They apply within the specified ambient temperature and supply voltage at maximum power setting unless otherwise stated. ...
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Characteristic Pin Gain variation across operation range Gain variation within channel Through gain CSO CTB IPIP2 2T IPIP3 2T IPIM2 2T IPIM3 2T LO operating range LO phase noise, SSB @ 10 kHz offset @ 100 kHz offset LO phase ...
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Characteristic Pin Conversion gain Gain variation within channel Through gain IPIP3 2T IPIM3 2T LO operating range LO phase noise, SSB @ 10 kHz offset @ 100 kHz offset LO phase noise floor IF output frequency 14, 15 range IF ...
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Characteristic Pin Charge pump drive 27 output current Crystal frequency 1,2 Recommended crystal series resistance External reference input 2 frequency External reference drive 2 level Phase detector comparison frequency Equivalent phase noise at phase detector Local oscillator programmable divider division ...
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Absolute Maximum Ratings - All voltages are referred to Vee (pins 7, 8, 11, 13, 16, 18, 23, 25). Characteristic Supply voltage input voltage All I/O port DC offsets SDA, SCL DC offsets Storage ...
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SL2101 RF inputs IF outputs Figure 30 - Input and Output Interface Circuits (RF section) 23 Zarlink Semiconductor Inc. Data Sheet Oscillator inputs ...
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V ccd 1 200µA Reference oscillator V ccd * * On SDA only SDA/SCL (pins 3 and 4) P0 Output port Figure 31 - Input and Output Interface Circuits (PLL section) Zarlink Semiconductor Inc. SL2101 Loop amplifier 120K ADD input ...
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For more information about all Zarlink products Information relating to products and services furnished herein by Zarlink Semiconductor Inc. or its subsidiaries (collectively “Zarlink”) is believed to be reliable. However, Zarlink assumes no liability for errors that may appear in ...