MSS1048-152NL AD [Analog Devices], MSS1048-152NL Datasheet

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MSS1048-152NL

Manufacturer Part Number
MSS1048-152NL
Description
Dual 5 A, 20 V Synchronous Step-Down
Manufacturer
AD [Analog Devices]
Datasheet

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Data Sheet
FEATURES
Input voltage: 4.5 V to 20 V
±1% output accuracy
Integrated 48 mΩ typical high-side MOSFET
Flexible output configuration
Programmable switching frequency: 250 kHz to 1.2 MHz
External synchronization input with programmable phase
Selectable PWM or PFM mode operation
Adjustable current limit for small inductors
External compensation and soft start
Startup into precharged output
Supported by ADIsimPower
APPLICATIONS
Communications infrastructure
Networking and servers
Industrial and instrumentation
Healthcare and medical
Intermediate power rail conversion
GENERAL DESCRIPTION
The
regulator based on a current mode architecture. The
integrates two high-side power MOSFETs and two low-side drivers
for the external N-channel MOSFETs. The two pulse-width mod-
ulation (PWM) channels can be configured to deliver dual 5 A
outputs or a parallel-to-single 10 A output. The regulator operates
from input voltages of 4.5 V to 20 V, and the output voltage can
be as low as 0.6 V.
The switching frequency can be programmed from 250 kHz to
1.2 MHz, or it can be synchronized to an external clock to
minimize interference in multirail applications. The dual PWM
channels run 180° out of phase, thereby reducing input current
ripple as well as reducing the size of the input capacitor.
The bidirectional synchronization pin can be programmed at
a 60°, 90°, or 120° phase shift to provide for a stackable, multi-
phase power solution.
The
modulation (PFM) mode at a light load for higher efficiency or
in forced PWM mode for noise sensitive applications. External
compensation and soft start provide design flexibility.
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
Dual output: 5 A/5 A
Parallel single output: 10 A
shift or internal clock output
ADP2325
ADP2325
is a full featured, dual output, step-down dc-to-dc
can be configured to operate in pulse frequency
TM
design tool
ADP2325
Regulator with Integrated High-Side MOSFET
Dual 5 A, 20 V Synchronous Step-Down
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
Fax: 781.461.3113
Independent enable inputs and power-good outputs provide
reliable power sequencing. To enhance system reliability, the device
includes undervoltage lockout (UVLO), overvoltage protection
(OVP), overcurrent protection, and thermal shutdown.
The
temperature range and is available in a 32-lead LFCSP_WQ
package.
C
INT
ADP2325
C
R
Figure 2. Efficiency vs. Output Current at V
DRV
OSC
100
95
90
85
80
75
70
65
60
55
50
0
TYPICAL APPLICATION CIRCUIT
V
V
INTVCC
MODE
SCFG
TRK2
TRK1
VDRV
GND
PGOOD2
PGOOD1
SYNC
RT
R
R
OUT
OUT
0.5
BOT2
operates over the −40°C to +125°C junction
TOP2
R
R
BOT1
= 5.0V
= 3.3V
TOP1
1.0
1.5
©2012 Analog Devices, Inc. All rights reserved.
ADP2325
R
C
OUTPUT CURRENT (A)
C2
C2
C
R
C
2.0
SS1
C1
Figure 1.
C1
C
SS2
2.5
3.0
C
PGND
C
IN2
SW1
SW2
IN1
DL1
DL2
IN
3.5
= 12 V, f
M1
M2
ADP2325
4.0
C
C
www.analog.com
BST1
BST2
SW
C
C
V
V
OUT2
OUT1
IN
IN
L2
L1
4.5
= 600 kHz
V
V
5.0
OUT1
OUT2

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MSS1048-152NL Summary of contents

Page 1

Data Sheet FEATURES Input voltage: 4 ±1% output accuracy Integrated 48 mΩ typical high-side MOSFET Flexible output configuration Dual output: 5 A/5 A Parallel single output Programmable switching frequency: 250 kHz to 1.2 MHz ...

Page 2

ADP2325 TABLE OF CONTENTS Features .............................................................................................. 1 Applications ....................................................................................... 1 Typical Application Circuit ............................................................. 1 General Description ......................................................................... 1 Revision History ............................................................................... 2 Functional Block Diagram .............................................................. 3 Specifications ..................................................................................... 4 Absolute Maximum Ratings ....................................................... 6 Thermal Resistance ...................................................................... 6 ...

Page 3

Data Sheet FUNCTIONAL BLOCK DIAGRAM 1.2V EN1 1µA 4µA SLOPE RAMP1 COMP1 0. SS1 SS1 + AMP1 TRK1 + FB1 – OVP 0.7V – + – 0.54V + PGOOD1 MODE SCFG SYNC OSCILLATOR RT 1.2V EN2 1µA 4µA ...

Page 4

ADP2325 SPECIFICATIONS PVIN1 = PVIN2 = −40°C to +125°C, unless otherwise noted. J Table 1. Parameters POWER INPUT (PVINx PINS) Power Input Voltage Range Quiescent Current (PVIN1 + PVIN2) Shutdown Current (PVIN1 + PVIN2) PVINx ...

Page 5

Data Sheet Parameters TRACKING INPUT (TRKx PINS) TRKx Input Voltage Range TRKx-to-FBx Offset Voltage TRKx Input Bias Current POWER GOOD (PGOODx PINS) Power-Good Rising Threshold Power-Good Hysteresis Power-Good Deglitch Time PGOODx Leakage Current PGOODx Output Low Voltage ENABLE (ENx PINS) ...

Page 6

ADP2325 ABSOLUTE MAXIMUM RATINGS Table 2. Parameter PVIN1, PVIN2, EN1, EN2 SW1, SW2 BST1, BST2 FB1, FB2, SS1, SS2, COMP1, COMP2, PGOOD1, PGOOD2, TRK1, TRK2, SCFG, SYNC, RT, MODE INTVCC, VDRV, DL1, DL2 PGND to GND Temperature Range Operating (Junction) ...

Page 7

Data Sheet PIN CONFIGURATION AND FUNCTION DESCRIPTIONS Table 4. Pin Function Descriptions Pin No. Mnemonic Description 1 PGOOD1 Power-Good Output (Open Drain) for Channel 1. A pull-up resistor of 10 kΩ to 100 kΩ is recommended. 2 SCFG Synchronization Configuration ...

Page 8

ADP2325 Pin No. Mnemonic Description 24, 25 SW1 Switch Node for Channel 1. 26, 27 PVIN1 Power Input for Channel 1. These pins are the power inputs for Channel 1 and provide power for the internal regulator. Connect to the ...

Page 9

Data Sheet TYPICAL PERFORMANCE CHARACTERISTICS T = 25° 3 2.2 µ OUT 100 INDUCTOR: FDVE1040-2R2M MOSFET: FDS8880 ...

Page 10

ADP2325 –40° +25° +125° (V) IN Figure 11. Shutdown Current vs. V 4.5 RISING FALLING 4.4 4.3 ...

Page 11

Data Sheet 604 603 602 601 600 599 598 597 596 –40 – TEMPERATURE (°C) Figure 17. Feedback Voltage vs. Temperature 660 R = 100kΩ OSC 640 620 600 580 560 540 –40 – ...

Page 12

ADP2325 CH1 5V CH2 2V M20ns T 40.4% Figure 23. Low-Side Driver Rising Edge Waveform, C 9.5 9.0 8.5 8.0 7.5 7.0 6.5 –40 – TEMPERATURE (°C) Figure 24. Peak Current-Limit Threshold ...

Page 13

Data Sheet V (AC) OUT CH1 100mV CH2 10V M 1ms B W CH4 1A Ω T 47.2% Figure 29. Power Saving Mode OUT 1 PGOOD 2 I OUT 4 CH1 ...

Page 14

ADP2325 V OUT CH1 2V CH2 10V M 10ms B W CH4 5A Ω T 19.8% Figure 35. Output Short SYNC 3 SW1 1 SW2 2 CH1 10V CH2 10V M 1µs CH3 5V ...

Page 15

Data Sheet 2 CH1 CH2 1V M 1ms 50.4% Figure 41. Coincident Tracking 1.2V OUT1 V = 3.3V OUT2 f = 500kHz CH1 = 0A CH1 ...

Page 16

ADP2325 THEORY OF OPERATION The ADP2325 is a full featured, dual output, step-down dc-to-dc regulator based on a current mode architecture. It integrates two high-side power MOSFETs and two low-side drivers for external MOSFETs. The ADP2325 is designed for high ...

Page 17

Data Sheet BOOTSTRAP CIRCUITRY The ADP2325 integrates the boot regulators to provide the gate drive voltage for the high-side NFETs. The regulators generate 5 V bootstrap voltages between the BSTx and the SWx pins recommended that an X7R ...

Page 18

ADP2325 If the overcurrent counter reaches 10 the FBx pin voltage falls to 0.2 V after the soft start, the device enters hiccup mode. During this mode, the high-side MOSFET and low-side driver are both turned off. The ...

Page 19

Data Sheet POWER GOOD The power-good (PGOODx) pin is an active high, open-drain output that indicates whether the regulator output voltage is within regulation. Logic high indicates that the voltage at the FBx pin (and, therefore, the output voltage) is ...

Page 20

ADP2325 APPLICATIONS INFORMATION INPUT CAPACITOR SELECTION The input decoupling capacitor attenuates high frequency noise on the input and acts as an energy reservoir. This capacitor should be a ceramic capacitor in the range of 10 µ µF and ...

Page 21

... Shielded ferrite core materials are recommended for low core loss and low EMI. Table 9. Recommended Inductors Value Vendor Part No. (μH) Sumida CDRH105RNP-0R8N 0.8 CDRH105RNP-1R5N 1.5 CDRH105RNP-2R2N 2.2 CDRH105RNP-3R3N 3.3 CDRH105RNP-4R7N 4.7 CDRH105RNP-6R8N 6.8 Coilcraft MSS1048-152NL 1.5 MSS1048-222NL 2.2 MSS1048-332NL 3.3 MSS1048-472NL 4.7 MSS1048-682NL 6.8 Wurth 7447797110 1.1 Elektronik 7447797180 1.8 7447797300 3.0 7447797470 4.7 7447797620 6.2 OUTPUT CAPACITOR SELECTION The output capacitor selection affects both the output voltage ripple and the loop dynamics of the regulator ...

Page 22

ADP2325 LOW-SIDE POWER DEVICE SELECTION The ADP2325 has integrated low-side MOSFET drivers, which can drive the low-side N-channel MOSFETs (NFETs). The selec- tion of the low-side N-channel MOSFET affects the dc-to-dc regulator performance. The selected MOSFET must meet the following ...

Page 23

Data Sheet The ADP2325 uses a transconductance amplifier for the error amplifier to compensate the system. Figure 51 shows the simplified peak current mode control small signal circuit. V OUT R TOP V – COMP + ...

Page 24

ADP2325 DESIGN EXAMPLE This section describes the design procedure and component selection for the example application shown in Figure 54, and Table 11 provides a list of the required settings. Table 11. Dual Step-Down DC-to-DC Regulator Requirements Parameter Specification Channel ...

Page 25

Data Sheet To meet the ±5% overshoot and undershoot requirement, use the following equation to calculate the capacitance: × ∆ × STEP OUT_OV + ∆ 2 − OUT ...

Page 26

ADP2325 SOFT START TIME PROGRAMMING The soft start feature allows the output voltage to ramp controlled manner, eliminating output voltage overshoot during soft start and limiting inrush current. The soft start time is set to 3 ms. ...

Page 27

Data Sheet EXTERNAL COMPONENTS RECOMMENDATIONS Table 12. Recommended External Components for Typical Applications with 5 A Output Current f (kHz) V ( OUT 300 1.2 12 1.5 12 1.8 12 2.5 12 3.3 ...

Page 28

ADP2325 TYPICAL APPLICATION CIRCUITS C INT 1µF C DRV 1µF R OSC 120kΩ Figure 54. Using an External MOSFET Application INT 1µF C DRV 1µF R OSC 100kΩ Figure 55. Using an External Diode Application ...

Page 29

Data Sheet R BOT1 10kΩ C INT 1µF R OSC 200kΩ C DRV 1µF Figure 56. Parallel Single Output Application BOT1 10kΩ C INT 1µF C DRV 1µF R OSC 100kΩ R BOT2 15kΩ 47.5kΩ Figure 57. Enable ...

Page 30

ADP2325 R BOT1 10kΩ C INT1 1µF C DRV1 1µF R OSC1 100kΩ R BOT2 2.21kΩ R BOT3 10kΩ C INT2 1µF C DRV2 1µF R OSC2 120kΩ R BOT4 2.21kΩ R TOP1 20kΩ 1200pF ...

Page 31

Data Sheet R TOP1 10kΩ R BOT1 2.21kΩ SYNC PGOOD2 PGOOD1 R PGOOD1 100kΩ INTVCC C INT MODE 1µF SCFG TRK2 TRK1 VDRV C DRV 1µF GND RT R OSC 200kΩ R BOT2 10kΩ R TOP2 20kΩ Figure 59. Programmable ...

Page 32

ADP2325 PACKAGING AND ORDERING INFORMATION OUTLINE DIMENSIONS PIN 1 INDICATOR 0.80 0.75 0.70 SEATING PLANE ORDERING GUIDE Model 1 Temperature Range ADP2325ACPZ-R7 −40°C to +125°C ADP2325-EVALZ ADP2325-BL1-EVZ ADP2325-BL2-EVZ RoHS Compliant Part. 2 For the blank evaluation boards, ...

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