TS2GF300 TRANSCEND [Transcend Information. Inc.], TS2GF300 Datasheet - Page 16

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TS2GF300

Manufacturer Part Number
TS2GF300
Description
300X CompactFlash Card
Manufacturer
TRANSCEND [Transcend Information. Inc.]
Datasheet
T
Transcend Information Inc.
T
T
S
S
S
2
2
2
Additional Requirements for CF Advanced Timing Modes
The CF Advanced Timing modes include PC Card I/O and Memory modes that are 100ns or faster, PC Card Ultra
DMA modes 3 or above and True IDE PIO Modes 5,6, Multiword DMA Modes 3,4 and True IDE Ultra DMA modes
3 or above.
Notes: 1) Control Signals: each card shall present a load to the socket no larger than 50 pF
G
When operating in CF Advanced timing modes, the host shall conform to the following requirements:
G
G
1) Only one CF device shall be attached to the CF Bus.
2) The host shall not present a load of more than 40pF to the device for all signals, including any cabling.
3) The maximum cable length is 0.15 m (6 in). The cable length is measured from the card connector to the host
~
~
~
controller. 0.46 m (18 in) cables are not supported.
1
1
1
2) Resistor is optional.
3) Status Signals: the socket shall present a load to the card no larger than 50 pF
4) Status Signals: the socket shall present a load to the card no larger than 50 pF
5) Status Signals: the socket shall present a load to the card no larger than 50 pF
6) BVD2 was not defined in the JEIDA 3.0 release. Systems fully supporting JEIDA release 3 SRAM cards shall
7) Address Signals: each card shall present a load of no more than 100pF
8) Data Signals: the host and each card shall present a load no larger than 50pF
9) Reset Signal: This signal is pulled up to prevent the input from floating when a CFA to PCMCIA adapter is used
10) Host and card restrictions for CF Advanced Timing Modes and Ultra DMA modes: Additional Requirements for
6
6
6
G
G
G
low state and 150
load
with DC current 700
state and 100
10
state and 100
10
state and 100
10
pull-up pin 45 (BVD2) to avoid sensing their batteries as “Low.”
150
requirements: (the number of sockets wired in parallel) multiplied by (100pF with DC current 450
and 150
150
AC timing requirements: 100pF with DC current 1.6mA low state and 300
wire two sockets in parallel without derating the card access speeds.
in a PCMCIA revision 1 host. However, to minimize DC current drain through the pull-up resistor in normal
operation the pull-up should be turned off once the Reset signal has been actively driven low by the host.
Consequently, the input is specified as an I2Z because the resistor is not necessarily detectable in the input
current leakage test.
CF Advanced Timing Modes and Ultra DMA Electrical Requirements for additional required limitations on the
implementation of CF Advanced Timing modes and Ultra DMA modes respectively.
while meeting all AC timing requirements: 50 pF at a DC current of 400
while meeting all AC timing requirements: 50 pF at a DC current of 400
while meeting all AC timing requirements: 50 pF at a DC current of 400
C
C
C
μ
μ
10
F
F
F
A high state. The host shall be able to drive at least the following load
A high state. The host and each card shall be able to drive at least the following load
while meeting all AC timing requirements: (the number of sockets wired in parallel) multiplied by (50 pF
3
3
μ
3
0
A high state per socket).
0
0
0
0
0
μ
μ
μ
A high state, including pull-up resistor. The card shall be able to drive at least the following load
A high state, including pull-up resistor. The card shall be able to drive at least the following load
A high state, including pull-up resistor. The card shall be able to drive at least the following load
μ
A high state, including pull-resistor. The socket shall be able to drive at least the following
μ
A low state and 150
μ
A high state per socket).
16
10
at a DC current of 450
μ
μ
μ
μ
A high state. This permits the host to
A low state and 1100
A low state and 100
A low state and 100
10
300X CompactFlash Card
10
10
10
10
while meeting all AC timing
at a DC current of 450
at a DC current of 400
at a DC current of 400
at a DC current of 400
10
at a DC current of 700
10
μ
while meeting all
A low state and
μ
μ
μ
μ
A high state.
A high state.
A high state.
A low state
μ
μ
μ
μ
A and
A low
A low
A low
μ
A
V1.1

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