TS2GF300 TRANSCEND [Transcend Information. Inc.], TS2GF300 Datasheet - Page 29

• Manufacturer Part Number: TS2GF300
• Description: 300X CompactFlash Card
• Manufacturer: TRANSCEND [Transcend Information. Inc.]

T
Notes:1) The UDMA interpretation of this signal is valid only during an Ultra DMA data burst.
Several signal lines are redefined to provide different functions during an Ultra DMA data burst. These lines assume their
UDMA definitions when:
1
2
3
4
These signal lines revert back to the definitions used for non-Ultra DMA transfers upon the negation of -DMACK by the
host at the termination of an Ultra DMA data burst.
With the Ultra DMA protocol, the STROBE signal that latches data from D[15:00] is generated by the same agent (either
host or device) that drives the data onto the bus. Ownership of D[15:00] and this data strobe signal are given either to the
device during an Ultra DMA data-in burst or to the host for an Ultra DMA data-out burst.
During an Ultra DMA data burst a sender shall always drive data onto the bus, and, after a sufficient time to allow for
propagation delay, cable settling, and setup time, the sender shall generate a STROBE edge to latch the data. Both
edges of STROBE are used for data transfers so that the frequency of STROBE is limited to the same frequency as the
data.
Words in the IDENTIFY DEVICE data indicate support of the Ultra DMA feature and the Ultra DMA modes the device is
capable of supporting. The Set transfer mode subcommand in the SET FEATURES command shall be used by a host to
Transcend Information Inc.
T
T
S
S
S
an Ultra DMA mode is selected, and
a host issues a READ DMA, or a WRITE DMA command requiring data transfer, and
the device asserts (-)DMARQ, and
the host asserts (-)DMACK.
2
2
2
mode, and True IDE (the original mode to support UDMA). The usage of signals in each of the modes is shown in Table
24:Ultra DMA Signal Usage In Each Interface Mode
2) The UDMA interpretation of this signal is valid only during and Ultra DMA data burst during a DMA Read command.
3) The UDMA interpretation of this signal is valid only during an Ultra DMA data burst during a DMA Write command.
4) The HSTROBE and DSTROBE signals are active on both the rising and the falling edge.
5) Address lines 03 through 10 are not used in True IDE mode.
True IDE Ultra DMA Mode Read/Write Timing Specification
G
G
G
DDMARDY(W)
HSTROBE(W)
UDMA Signal
DSTROBE(R)
HDMARDY(R)
Card Select
ADDRESS
~
~
~
DMARQ
DMACK
INTRQ
STOP
DATA
CSEL
1
1
1
Ultra DMA operations can take place in any of the three basic interface modes: PC Card Memory mode, PC Card I/O
6
6
6
G
G
G
C
C
C
F
F
F
3
3
3
Output
Output
Output
Type
Input
Input
Input
Input
Input
Input
0
Bidir
0
0
0
0
0
43 (-INPACK)
… (D[15:00])
… (A[10:00])
UDMA MEM
37 (READY)
35 (-IOWR)
39 (-CSEL)
Pin # (Non
34 (-IORD)
42 (-WAIT)
44 (-REG)
31 (-CE2)
7 (-CE1)
MODE)
2HSTROBE(W)
-DDMARDY(W)
DSTROBE(R)
-HDMARDY(R)
PC CARD MEM
MODE UDMA
-DMARQ
-DMACK
D[15:00]
A[10:00]
STOP 1
READY
-CSEL
-CE1
-CE2
29
1. 2. 4
1, 3, 4
1, 3
1
,
PC CARD IO MODE
HSTROBE(W)
DSTROBE(R)
-DDMARDY(W)
-HDMARDY(R)
-DMARQ
D[15:00]
A[10:00]
DMACK
-INTRQ
STOP 1
UDMA
-CSEL
-CE1
-CE2
300X CompactFlash Card
1. 2. 4
1, 3, 4
1, 2
1, 3
HSTROBE(W)
DSTROBE(R)
-DDMARDY(W)
TRUE IDE MODE
-HDMARDY(R)
A[02:00] 5
-DMACK
D[15:00]
DMARQ
STOP 1
INTRQ
UDMA
-CSEL
-CS0
-CS1
1. 2. 4
1, 3, 4
1, 2
1, 3
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