IDT7008L IDT [Integrated Device Technology], IDT7008L Datasheet - Page 13

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IDT7008L

Manufacturer Part Number
IDT7008L
Description
HIGH-SPEED 64K x 8 DUAL-PORT STATIC RAM
Manufacturer
IDT [Integrated Device Technology]
Datasheet

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DATA
NOTES:
1. To ensure that the earlier of the two ports wins. t
2. CE
3. OE = V
4. If M/S = V
5. All timing is the same for left and right ports. Port "A" may be either the left or right port. Port "B" is the port opposite from port "A".
NOTES:
1. t
2. BUSY is asserted on port "B" blocking R/W
3. t
IDT7008S/L
High-Speed 64K x 8 Dual-Port Static RAM
DATA
ADDR
ADDR
WH
WB
BUSY
L
R/ W
OUT "B"
is only for the 'Slave' version.
must be met for both BUSY input (SLAVE) and output (MASTER).
= CE
IN "A"
IL
"A"
"A"
"B"
"B"
for the reading port.
R
IL
= V
(SLAVE), then BUSY is an input (BUSY
IL,
refer to Chip Enable Truth Table.
t
APS
(1)
BUSY
R/W
R/W
"A"
"B"
"B"
"B"
, until BUSY
APS
"A"
is ignored for M/S = V
= V
IH
"B"
t
and BUSY
WB
goes HIGH.
(3)
BUSY
"B"
MATCH
= "don't care", for this example).
IL
t
6.42
WC
(SLAVE).
t
13
WP
(2)
S
t
Military, Industrial and Commercial Temperature Ranges
WP
MATCH
t
DW
t
WDD
VALID
t
WH
BUSY
(1)
3198 drw 14
t
DDD
(3)
t
BDA
t
DH
S
3198 drw 13
t
BDD
VALID

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