IDT7008L IDT [Integrated Device Technology], IDT7008L Datasheet - Page 2

• Manufacturer Part Number: IDT7008L
• Description: HIGH-SPEED 64K x 8 DUAL-PORT STATIC RAM
• Manufacturer: IDT [Integrated Device Technology]

IDT7008 is designed to be used as a stand-alone 512K-bit Dual-Port RAM
or as a combination MASTER/SLAVE Dual-Port RAM for 16-bit-or-more
word systems. Using the IDT MASTER/SLAVE Dual-Port RAM approach
in 16-bit or wider memory system applications results in full-speed, error-
free operation without the need for additional discrete logic.
address, and I/O pins that permit independent, asynchronous access for
NOTES:
1. This text does not indicate orientation of the actual part marking.
2. All Vcc pins must be connected to power supply.
3. Package body is approximately 1.15 in x 1.15 in x .17 in.
4. This package code is used to reference the package diagram.
5. All GND pins must be connected to ground supply.
IDT7008S/L
High-Speed 64K x 8 Dual-Port Static RAM
The IDT7008 is a high-speed 64K x 8 Dual-Port Static RAM. The
This device provides two independent ports with separate control,
BUSY
BUSY
INT
GND
INT
M/S
INDEX
A
A
A
A
A
A
A
A
A
A
A
A
A
A
NC
6R
5R
4R
3R
2R
1R
0R
0L
1L
2L
3L
4L
5L
6L
R
R
L
L
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33 34 35 36 37 38 39 40 41 42 43 44 45
11 10 9 8 7 6 5
4 3
84-Pin PLCC
Top View
IDT7008J
J84-1
2 1 84 83
2
reads or writes to any location in memory. An automatic power down
feature controlled by the chip enables (CE
circuitry of each port to enter a very low standby power mode.
devices typically operate on only 750mW of power.
a 84-pin Plastic Leadless Chip Carrier (PLCC) and a 100-pin Thin Quad
Flatpack (TQFP).
(4)
(5)
Fabricated using IDT’s CMOS high-performance technology, these
The IDT7008 is packaged in a 84-pin Ceramic Pin Grid Array (PGA),
Military, Industrial and Commercial Temperature Ranges
46 47 48 49 50 51 52 53
82 81 80 79 78 77 76 75
74
73
72
71
70
69
68
67
66
65
64
63
62
61
60
59
58
57
56
55
54
0
3198 drw 02
and CE
NC
I/O
I/O
I/O
I/O
I/O
Vcc
I/O
I/O
I/O
GND
Vcc
I/O
I/O1
GND
I/O
I/O
I/O
I/O
I/O
I/O
7R
6R
5R
4R
3R
2R
1R
0R
0L
2L
3L
4L
5L
6L
7L
1
L
) permit the on-chip
,