TSS463-AAR ATMEL [ATMEL Corporation], TSS463-AAR Datasheet - Page 27
TSS463-AAR
Manufacturer Part Number
TSS463-AAR
Description
VAN Data Link Controller with Serial Interface
Manufacturer
ATMEL [ATMEL Corporation]
Datasheet
1.TSS463-AAR.pdf
(60 pages)
- Current page: 27 of 60
- Download datasheet (2Mb)
Control and Status Registers
Line Control Register (0x00)
CD[3:0]:Clock Divider
PC: Pulsed Code
IVTX: Invert TxD output
IVRX: Invert RxD inputs
Transmit Control Register
(0x01)
MR[3:0]: Maximum Retries
4205B–AUTO–12/04
•
•
•
They control the VAN Bus rate through a Baud Rate generator according to the formula
below:
One: The TSS463AA will transmit and receive data using the pulsed coding mode (i.e
optical or radio link mode). The use of this mode implies communication via the RxD0
input and the non-functionality of the diagnosis system.
Zero: (Default at reset). The TSS463AA will transmit and receive data using the
Enhanced Manchester code. (RxD0, RxD1, RxD2 used).
The user can invert the logical levels used on either the TxD output or the RxD inputs in
order to adapt to different line drivers and receivers.
One: A one on either of these bits will invert the respective signals.
Zero: (Default at reset). The TSS463AA will set TxD to recessive state in Idle mode and
consider the bus free (recessive states on RxD inputs).
Read/Write register.
Default value after reset: 0x02
These bits allow the user to control the amount of retries the circuit will perform if any
errors occurred during transmission.
f TSCLK
MR3
CD3
Read/write register.
Default value after reset: 0 00
Reserved: Bit 2, this bit must not be set by the user; a 0 must always be written to
this bit.
7
7
=
MR2
CD2
f XTAL1
------------------------ -
6
6
n
16
MR1
CD1
5
5
MR0
CD0
4
4
VER2
PC
3
3
VER1
2
0
2
TSS463-AA
VER0
IVTX
1
1
IVRX
MT
0
0
27
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