IDT72V36102 IDT [Integrated Device Technology], IDT72V36102 Datasheet - Page 18

• Manufacturer Part Number: IDT72V36102
• Description: 3.3 VOLT CMOS SyncBiFIFO-TM
• Manufacturer: IDT [Integrated Device Technology]

NOTE:
1. t
A0-A35
B0-B35
IDT72V3682/72V3692/72V36102 3.3V CMOS SyncBiFIFO
16,384 x 36 x 2, 32,768 x 36 x 2 and 65,536 x 36 x 2
CLKA
CLKB edge is less than t
CLKB
W/RB
SKEW1
WRA
MBB
CSA
MBA
ENA
CSB
EFB
ENB
FFA
is the minimum time between a rising CLKA edge and a rising CLKB edge for EFB to transition HIGH in the next CLKB cycle. If the time between the rising CLKA edge and rising
FIFO1 Empty
HIGH
LOW
LOW
LOW
HIGH
HIGH
Figure 9. EFB Flag Timing and First Data Read Fall Through when FIFO1 is Empty (IDT Standard Mode)
t
SKEW1
t
ENS2
ENS2
t
DS
, then the transition of EFB HIGH may occur one CLKB cycle later than shown.
W1
t
SKEW1
t
t
t
ENH
ENH
DH
(1)
t
CLKH
1
t
CLK
t
CLKL
TM
18
t
2
POR
t
t
CLKH
ENS2
t
CLK
t
CLKL
t
POR
t
A
t
ENH
COMMERCIAL TEMPERATURE RANGE
W1
4679 drw 12